
65
ATmega8515(L)
2512A–AVR–04/02
DDB6. When the pin isforcedbythe SPI to beaninput, the pull-upcan still be con-
trolledbythePORTB6 bit.
• MOSI – Port B, Bit 5
MOSI: SPIMasterData output,Slave Data input forSPIchannel. When the SPI is
enabled as a Slave, thispin isconfigured as an input regardless of the setting of DDB5.
When the SPI is enabled as a Master, the data direction of thispin iscontrolledby
DDB5. When the pin isforcedbythe SPI to beaninput, the pull-upcan still be con-
trolledbythePORTB5 bit.
•SS
–PortB,Bit4
SS
:Slave Selectinput. When the SPI is enabled as a Slave, thispin isconfigured as an
input regardless of the setting of DDB4. As a Slave, the SPI is activatedwhen thispin is
driven low. When the SPI is enabled as a Master, the data direction of thispin iscon-
trolled by DDB4. When the pin isforcedbythe SPI to beaninput, the pull-upcan still be
controlledbythePORTB4 bit.
• AIN1 – Port B, Bit 3
AIN1, Analog ComparatorNegative input. Configurethe port pin as input with theinter-
nalpull-upswitched off to avoid the digitalport function from interfering with the function
of theAnalog Comparator.
• AIN0 – Port B, Bit 2
AIN0, Analog Comparator Positive input. Configurethe port pin as input with theinternal
pull-upswitched off to avoid the digitalport function from interfering with the function of
theAnalog Comparator.
•T1–PortB,Bit1
T1, Timer/Counter1 CounterSource.
•T0/OC0–PortB,Bit0
T0, Timer/Counter0 CounterSource.
OC0,Output Compare Match output: ThePB0 pin can serve as an external output for
theTimer/Counter0 Compare Match.ThePB0 pin has to be configured as an output
(DDB0 set (one)) to serve thisfunction. The OC0 pin is alsothe output pin for thePWM
modetimerfunction.
Table 31 relate thealternate functions of Port B to theoverriding signals showninFigure
32onpage 61. SPIMSTR INPUTandSPISLAVEOUTPUT constitute the MISO signal,
while MOSI isdivided into SPIMSTR OUTPUTandSPISLAVEINPUT.
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