Rainbow-electronics W90P710CDG Manual do Utilizador Página 535

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W90P710CD/W90P710CDG
- 536 -
EMC Registers Map, continued
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
C
AM12M 0xFFF0_3068 R/W CAM12 Most Significant Word Register 0x0000_0000
C
AM12L 0xFFF0_306C R/W CAM12 Least Significant Word Register 0x0000_0000
C
AM13M 0xFFF0_3070 R/W CAM13 Most Significant Word Register 0x0000_0000
C
AM13L 0xFFF0_3074 R/W CAM13 Least Significant Word Register 0x0000_0000
C
AM14M 0xFFF0_3078 R/W CAM14 Most Significant Word Register 0x0000_0000
C
AM14L 0xFFF0_307C R/W CAM14 Least Significant Word Register 0x0000_0000
C
AM15M 0xFFF0_3080 R/W CAM15 Most Significant Word Register 0x0000_0000
C
AM15L 0xFFF0_3084 R/W CAM15 Least Significant Word Register 0x0000_0000
T
XDLSA 0xFFF0_3088 R/W
T
ransmit Descriptor Link List Start Address Registe
r
0xFFFF_FFFC
RXDLSA 0xFFF0_308C R/W
Receive Descriptor Link List Start Addres
s
Register
0xFFFF_FFFC
MCMDR 0xFFF0_3090 R/W MAC Command Register 0x0000_0000
MIID 0xFFF0_3094 R/W MII Management Data Register 0x0000_0000
MIIDA 0xFFF0_3098 R/W MII Management Control and Address Register 0x0090_0000
FFTCR 0xFFF0_309C R/W FIFO Threshold Control Register 0x0000_0101
T
SDR 0xFFF0_30A0 W
T
ransmit Start Demand Register Undefined
RSDR 0xFFF0_30A4 W Receive Start Demand Register Undefined
DMARFC 0xFFF0_30A8 R/W Maximum Receive Frame Control Register 0x0000_0800
MIEN 0xFFF0_30AC R/W MAC Interrupt Enable Register 0x0000_0000
MISTA 0xFFF0_30B0 R/W MAC Interrupt Status Register 0x0000_0000
MGSTA 0xFFF0_30B4 R/W MAC General Status Register 0x0000_0000
MPCNT 0xFFF0_30B8 R/W Missed Packet Count Register 0x0000_7FFF
MRPC 0xFFF0_30BC R MAC Receive Pause Count Register 0x0000_0000
MRPCC 0xFFF0_30C0 R MAC Receive Pause Current Count Register 0x0000_0000
MREPC 0xFFF0_30C4 R MAC Remote Pause Count Register 0x0000_0000
DMARFS 0xFFF0_30C8 R/W DMA Receive Frame Status Register 0x0000_0000
C
TXDSA 0xFFF0_30CC R
Current Transmit Descriptor Start Addres
s
Register
0x0000_0000
C
TXBSA 0xFFF0_30D0 R Current Transmit Buffer Start Address Register 0x0000_0000
C
RXDS
A
0xFFF0_30D4 R
Current Receive Descriptor Start Addres
s
Register
0x0000_0000
C
RXBS
A
0xFFF0_30D8 R Current Receive Buffer Start Address Register 0x0000_0000
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