Rainbow-electronics W90P710CDG Manual do Utilizador descarregar pdf (Página 467)

100

101

W90P710CD/W90P710CDG

Publication Release Date: September 19, 2006

- 467 - Revision B2

BITS DESCRIPTIONS

[31:8]

RESERVED -

[7:0]

BLH

8 bit Baud rate divider Latch High byte register

This register combining with BLL and CBR determine internal

sampling clock frequency.

Bit 7 ~ 0: Baud rate divisor latch higher byte values. Default to be

00h.

SMART CARD ID NUMBER (SCHI_ID)

SCHI_ID0

0xFFF8_5008

(DLAB = 1)

R Smart card ID number Register 0 0x0000_0070

SCHI_ID1

0XFFF8_5808

(DLAB = 1)

R Smart card ID number Register 1 0x0000_0070

BITS DESCRIPTIONS

[31:8]

RESERVED -

[7:0]

8 bit smart card ID number register

This register contains a specific value of 70h for driver to identify

Smart Card interface.

31 30 29 28 27 26 25 24

RESERVED

23 22 21 20 19 18 17 16

RESERVED

15 14 13 12 11 10 9 8

RESERVED

7 6 5 4 3 2 1 0

ID[7:0]

1 2 ... 462 463 464 465 466 467 468 469 470 471 472 ... 551 552

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