Rainbow-electronics W90P710CDG Manual do Utilizador Página 71

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W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 71 - Revision B2
Continued.
BITS DESCRIPTION
[2:1] WAITVT
Valid time of nWAIT signal
W90P710 recognizes the nWAIT signal at the next “nth” MCLK rising
edge after the nOE or nWBE active cycle. WAITVT bits determine the n.
WAITVT [2:1] nth MCLK
0 0 1
0 1 2
1 0 3
1 1 4
[0] LITTLE
Little Endian mode
After power on reset, the content of LITTLE is the Power-On Setting
value from D14 pin. If pin D14 is pull-down, the external memory format
is Big Endian mode. If pin D14 is pull-up, the external memory format is
Little Endian mode. For more detail, refer to Power-On Setting of System
Manager.
NOTE: This bit is read only.
ROM/Flash Control Register ROMCON
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ROMCON
0xFFF0_1004
R/W ROM/FLASH control register
0x0000_0XFC
31 30 29 28 27 26 25 24
BASADDR
23 22 21 20 19 18 17 16
BASADDR SIZE
15 14 13 12 11 10 9 8
RESERVED tPA
7 6 5 4 3 2 1 0
tACC BTSIZE PGMODE
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