Rainbow-electronics W90P710CDG Manual do Utilizador descarregar pdf (Página 512)

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W90P710CD/W90P710CDG

Publication Release Date: September 19, 2006

- 513 - Revision B2

Continued

BITS DESCRIPTIONS

[8]

EnCMD

Enable write PS2 Host Controller Commands

This bit enables the write function of Host controller command to

device. Set this bit will start the write process of PS2CMD content

and hardware will automatically clear this bit while write process is

finished.

[7:0]

PS2CMD

PS2 Host Controller Commands

This command filed is sent by the Host to the Keyboard. The most

common command would be the setting/resetting of the Status

Indicators (i.e. the Num lock, Caps Lock & Scroll Lock LEDs).

PS2 Host Controller Status Register (PS2_STS)

PS2STS 0xFFF8_9004 R/W Status register 0x0000_0000

31 30 29 28 27 26 25 24

RESERVED

23 22 21 20 19 18 17 16

RESERVED

15 14 13 12 11 10 9 8

RESERVED

7 6 5 4 3 2 1 0

RESERVED TX_err TX_IRQ RESERVED RX_IRQ

BITS DESCRIPTIONS

[31:6] RESERVED -

[5]

TX_err

This Transmit Error Status bit indicates software that device

doesn’t response ACK after Host wrote a command to it.

This bit is valid when TX_IRQ is asserted. It will automatically

reset after software starts next command writing process.

This bit is read only.

[4]

TX_IRQ

This Transmit Complete Interrupt bit indicates software that

the process of Host controller writing command to device is

finished. Software needs to write one to this bit to clear this

interrupt.

1 2 ... 507 508 509 510 511 512 513 514 515 516 517 ... 551 552

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