Rainbow-electronics ATmega64C1 Manual do Utilizador descarregar pdf (Página 303)

100

101

303

7647A–AVR–02/08

ATmega32/64/M1/C1

24.8.15 Parallel Programming Characteristics

Figure 24-7. Parallel Programming Timing, Including some General Timing Requirements

Figure 24-8. Parallel Programming Timing, Loading Sequence with Timing Requirements

(1)

Note: 1. The timing requirements shown in Figure 24-7 (i.e., t

DVXH

, t

XHXL

, and t

XLDX

) also apply to load-

ing operation.

Data & Contol

(DATA, XA0/1, BS1, BS2)

XTAL1

XHXL

WLWH

DVXH

XLDX

PLWL

WLRH

RDY/BSY

PAGEL

PHPL

PLBX

BVPH

XLWL

WLBX

BVWL

WLRL

XTAL1

PAGEL

PLXH

XLXH

XLPH

ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte)

DATA

BS1

XA0

XA1

LOAD ADDRESS

(LOW BYTE)

LOAD DATA

(LOW BYTE)

LOAD DATA

(HIGH BYTE)

LOAD DATA

LOAD ADDRESS

(LOW BYTE)

1 2 ... 298 299 300 301 302 303 304 305 306 307 308 ... 365 366

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