Rainbow-electronics ATmega128L Manual do Utilizador descarregar pdf (Página 41)

ATmega128(L)

2467B–09/01

Power Management

and Sleep Modes

Sleep modes enable the application to shut down unused modules in the MCU, thereby

saving power. The AVR provides various sleep modes allowing the user to tailor the

power consumption to the application’s requirements.

To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one

and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the

MCUCR register select which sleep mode (Idle, ADC Noise Reduction, Power-down,

Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction.

See

Table 17 for a summary. If an enabled interrupt occurs while the MCU is in a sleep

mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the

start-up time, it executes the interrupt routine, and resumes execution from the instruc-

tion following SLEEP. The contents of the register file and SRAM are unaltered when

the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes

up and executes from the Reset vector.

Figure 17 on page 33 presents the different clock systems in the ATmega128, and their

distribution. The figure is helpful in selecting an appropriate sleep mode.

MCU Control Register –

MCUCR

The MCU Control Register contains control bits for power management.

• Bit 5 - SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the

SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is

the programmers purpose, it is recommended to write the Sleep Enable (SE) bit to one

just before the execution of the SLEEP instruction and to clear it immediately after wak-

ing up.

• Bits 4..2 - SM2..0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the six available sleep modes as shown in

Table 17.

Note: 1. Standby Mode and Extended Standby Mode are only available with external crystals

or resonators.

Bit 76543210

SRE SRW10 SE SM1 SM0 SM2 IVSEL IVCE MCUCR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial value00000000

Table 17. Sleep Mode Select

SM2 SM1 SM0 Sleep Mode

000Idle

0 0 1 ADC Noise Reduction

010Power-down

011Power-save

100Reserved

101Reserved

110Standby

(1)

1 1 1 Extended Standby

(1)

1 2 ... 36 37 38 39 40 41 42 43 44 45 46 ... 330 331

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