Rainbow-electronics NUC120 Manual do Utilizador descarregar pdf (Página 6)

NUC120 Series DATA SHEET

Publication Release Date: May 31, 2010

- 6 - Revision V1.02

2 FEATURES

• Core

– ARM® Cortex™-M0 core runs up to 50 MHz.

– One 24-bit system timer.

– Supports low power sleep-mode.

– Single-cycle 32-bit hardware multiplier.

– NVIC for the 32 interrupt inputs, each with 4-levels of priority.

– Serial Wire Debug supports with 2 watchpoints/4 breakpoints.

• Wide operating voltage ranges from 2.5V to 5.5V

• Flash EPROM Memory

– 32K/64K/128K bytes Flash EPROM for program code.

– 4KB flash for ISP loader

– Support In-system program(ISP) and In-application program(IAP) application code update

– 512 byte page erase for flash

– Configurable data flash address and size for 128KB system, fixed 4KB data flash for the 32KB

and 64KB system.

– Support 2 wire ICP update from ICE interface

– Support fast parallel programming mode by external programmer.

• SRAM Memory

– 4K/8K/16K bytes embedded SRAM.

– Support PDMA mode

• PDMA (Peripheral DMA)

– Support 9 channels PDMA for automatic data transfer between SRAM and peripherals.

• Clock Control

– Flexible selection for different applications.

– Build-in 22 MHz OSC (Trimmed to 1%) for system operation, and low power 10 kHz OSC for

watchdog and wakeup sleep operation.

– Support one PLL, up to 50 MHz, for high performance system operation.

– External 12 MHz crystal input for USB and precise timing operation.

– External 32 kHz crystal input for RTC function and low power system operation.

• GPIO

– Four I/O modes:

 Quasi bi-direction

 Push-Pull output

 Open-Drain output

 Input only with high impendence

– TTL/Schmitt trigger input selectable.

– I/O pin can be configured as interrupt source with edge/level setting.

– High driver and high sink IO mode support.

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