MAX1401
+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
24 ______________________________________________________________________________________
Input Buffers
The MAX1401 provides a pair of input buffers to isolate
the inputs from the capacitive load presented by the
PGA/modulator (Figure 6). The buffers are chopper sta-
bilized to reduce the effect of their DC offsets and low-
frequency noise. Since the buffers can represent more
than 50% of the total analog power dissipation, they
may be shut down in applications where minimum
power dissipation is required and the capacitive input
load is not a concern. Disable the buffers in applications
where the inputs must operate close to AGND or V+.
When used in buffered mode, the buffers isolate the
inputs from the sampling capacitors. The sampling-
related gain error is dramatically reduced in this mode.
A small dynamic load remains from the chopper stabi-
lization. The multiplexer exhibits a small input leakage
current of up to 10nA. With high source resistances,
this leakage current may result in a DC offset.
Table 13c. R
EXT
, C
EXT
Values for Less than 16-Bit Gain Error in Unbuffered (BUFF = 0)
Mode; 4x Modulator Sampling Frequency (MF1, MF0 = 10 ); X2CLK = 0; f
CLKIN
=
2.4576MHz
Table 13d. R
EXT
, C
EXT
Values for Less than 16-Bit Gain Error in Unbuffered (BUFF = 0)
Mode; 8x Modulator Sampling Frequency (MF1, MF0 = 11); X2CLK = 0; f
CLKIN
=
2.4576MHz
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