Rainbow-electronics MAX194 Manual do Utilizador

_______________General DescriptionThe MAX194 is a 14-bit successive-approximation ana-log-to-digital converter (ADC) that combines highspeed, high acc

MAX194mum (1.7MHz), reading the data after each conversion(during the acquisition time) results in lower throughput(about 70ksps max) than reading the

MAX19414-Bit, 85ksps ADC with 10µA Shutdown______________________________________________________________________________________ 11BRIDGEINSTRUMENTAT

MAX194be improved by trimming, but the drift is too great toprovide good stability over temperature. The MAX427buffer provides the necessary drive cur

MAX19414-Bit, 85ksps ADC with 10µA Shutdown______________________________________________________________________________________ 13INPUTSIGNAL1N914DI

MAX194REF and AIN Input ProtectionThe REF and AIN signals should not exceed theMAX194 supply rails. If this can occur, diode clamp thesignal to the su

Input Acquisition and SettlingFour conversion-clock periods are allocated for acquir-ing the input signal. At the highest conversion rate, fourclock p

MAX194DC AccuracyIf DC accuracy is important, choose a buffer with anoffset much less than the MAX194’s maximum offset(±1 LSB = ±488µV for a ±4V input

Data is clocked out of the MAX194 on CLK’s fallingedge and can be clocked into the µP on the risingedge or the following falling edge. If you clock da

MAX194Complete source code for the Motorola 68HC16 andthe MAX194 evaluation kit (EV kit) using this mode isavailable in the MAX194 EV kit manual.Mode

MAX19414-Bit, 85ksps ADC with 10µA Shutdown______________________________________________________________________________________ 19Figure 21. MAX194

MAX19414-Bit, 85ksps ADC with 10µA Shutdown2 _______________________________________________________________________________________ABSOLUTE MAXIMUM R

MAX19414-Bit, 85ksps ADC with 10µA Shutdown20 ______________________________________________________________________________________Figure 21. MAX194

MAX19414-Bit, 85ksps ADC with 10µA Shutdown______________________________________________________________________________________ 21Constraints on seq

MAX19414-Bit, 85ksps ADC with 10µA Shutdown22 ______________________________________________________________________________________MAX19410µFVDDDVDDA

MAX19414-Bit, 85ksps ADC with 10µA Shutdown______________________________________________________________________________________ 23measure of the ADC

MAX19414-Bit, 85ksps ADC with 10µA ShutdownSpurious-Free Dynamic RangeSpurious-free dynamic range is the ratio of the funda-mental RMS amplitude to th

MAX19414-Bit, 85ksps ADC with 10µA Shutdown_______________________________________________________________________________________ 3ELECTRICAL CHARACT

MAX19414-Bit, 85ksps ADC with 10µA Shutdown4 _______________________________________________________________________________________VDDD = VDDA = 5.25

_______________Detailed DescriptionThe MAX194 uses a successive-approximation register(SAR) to convert an analog input to a 14-bit digitalcode, which

MAX194CalibrationIn an ideal DAC, each of the capacitors associated withthe data bits would be exactly twice the value of thenext smaller capacitor. I

If the power supplies do not settle within the MAX194’spower-on delay (500ns minimum), power-up calibrationmay begin with supply voltages that differ

MAX194sion and EOC will go high on the following CLK fallingedge (Figure 4). CONV is ignored during conversions.External ClockThe conversion clock (CL

If you read the data bits between conversions, you can 1) count CLK cycles until the end of the conversion, or 2) poll EOC to determine when the conve