
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
4 _______________________________________________________________________________________
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Differential Reference Input
Voltage
∆V
REF
∆V
REF
= V
REFP
- V
REFN
1.024
± 10%
V
COM Input Voltage V
COM
V
DD
/2
± 10%
V
REFP Input Voltage V
REFP
V
COM
+ ∆V
REF
/2
V
REFN Input Voltage V
REFN
V
COM
- ∆V
REF
/2
V
DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)
CLK
0.8 x
V
DD
Input High Threshold V
IH
PD, OE, SLEEP, T/B
0.8 x
OV
DD
V
CLK
0.2 x
V
DD
Input Low Threshold V
IL
PD, OE, SLEEP, T/B
0.2 x
OV
DD
V
Input Hysteresis V
HYST
0.1 V
I
IH
V
IH
= OV
DD
or V
DD
(CLK) ±5
Input Leakage
I
IL
V
IL
= 0 ±5
µA
Input Capacitance C
IN
5pF
DIGITAL OUTPUTS (D9A–D0A, D9B–D0B)
Output Voltage Low V
OL
I
SINK
= 200µA 0.2 V
Output Voltage High V
OH
I
SOURCE
= 200µA
OV
DD
- 0.2
V
Three-State Leakage Current I
LEAK
OE = OV
DD
±10 µA
Three-State Output Capacitance C
OUT
OE = OV
DD
5pF
POWER REQUIREMENTS
Analog Supply Voltage Range V
DD
2.7 3.0 3.6 V
Output Supply Voltage Range OV
DD
1.7 2.5 3.6 V
Operating, f
INA or B
= 20MHz at -0.5dB FS 82 97
Sleep mode 2.8
mA
Analog Supply Current I
VDD
Shutdown, clock idle, PD = OE = OV
DD
115µA
Operating, C
L
= 15pF , f
INA or B
= 20MHz at
-0.5dB FS
13 mA
Sleep mode 100 µA
Output Supply Current I
OVDD
Shutdown, clock idle, PD = OE = OV
DD
210µA
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +3V, OV
DD
= +2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through
a 10kΩ resistor, V
IN
= 2V
p-p
(differential w.r.t. COM), C
L
= 10pF at digital outputs (Note 5), f
CLK
= 83.333MHz (50% duty cycle), T
A
=
T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
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