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171

2588B–AVR–11/06

ATtiny261/461/861

22.5 Page Size

22.6 Parallel Programming Parameters, Pin Mapping, and Commands

This section describes how to parallel program and verify Flash Program memory, EEPROM

Data memory, Memory Lock bits, and Fuse bits in the ATtiny261/461/861. Pulses are assumed

to be at least 250 ns unless otherwise noted.

22.6.1 Signal Names

In this section, some pins of the ATtiny261/461/861 are referenced by signal names describing

their functionality during parallel programming, see Figure 22-1 and Table 22-9. Pins not

described in the following table are referenced by pin names.

The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.

The bit coding is shown in Table 22-11.

When pulsing WR

or OE, the command loaded determines the action executed. The different

Commands are shown in Table 22-12.

Table 22-7. No. of Words in a Page and No. of Pages in the Flash

Device Flash Size Page Size PCWORD No. of Pages PCPAGE PCMSB

ATtiny261 1K words (2K bytes) 16 words PC[3:0] 64 PC[9:4] 9

ATtiny461 2K words (4K bytes) 32 words PC[4:0] 64 PC[10:5] 10

ATtiny861 4K words (8K bytes) 32 words PC[4:0] 128 PC[11:5] 11

Table 22-8. No. of Words in a Page and No. of Pages in the EEPROM

Device

EEPROM

Size Page Size PCWORD No. of Pages PCPAGE EEAMSB

ATtiny261 128 bytes 4 bytes EEA[1:0] 64 EEA[6:2] 6

ATtiny461 256 bytes 4 bytes EEA[1:0] 64 EEA[7:2] 7

ATtiny861 512 bytes 4 bytes EEA[1:0] 128 EEA[8:2] 8

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