Rainbow-electronics ATmega103L Manual do Utilizador descarregar pdf (Página 109)

ATmega603/103

109

Figure 78. External RAM Timing

External Clock Drive Waveforms

Figure 79. External Clock Drive Waveforms

Table 50. External Clock Drive

Note: See “External Data Memory Timing” on page 107 for a description of how the duty cycle influences the timing for the External

Data Memory

Symbol Parameter V

= 2.7V to 3.6V V

= 4.0V to 5.5V Units

1/t

CLCL

Oscillator Frequency 0 4 0 6 MHz

CLCL

Clock Period 250 167 ns

CHCX

High Time 100 67 ns

CLCX

Low Time 100 67 ns

CLCH

Rise Time 1.6 0.5 µs

CHCL

Fall Time 1.6 0.5 µs

System Clock O

ALE

Data / Address [7..0]

Address [15..8]

Address

T1 T2 T3 T4

Prev. Address

213

Note: Clock cycle T3 is only present when external SRAM waitstate is enabled

Data

WriteRead

Addr.

VIL1

VIH1

1 2 ... 104 105 106 107 108 109 110 111 112 113 114 ... 125 126

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Rainbow-electronics ATmega103L Manual do Utilizador Página 109