
38
4202E–SCR–06/06
Note: 1. Only for AT8xC5122
IPH0 B7h
Interrupt Priority Control
High 0
PSH PT1HPX1HPT0HPX0H
IPL1 B2h
Interrupt Priority Control
Low 1
PUSBL PSCIL PSPIL
(1)
PKBL
(1)
IPH1 B3h
Interrupt Priority Control
High 1
PUSBH PSCIH PSPIH
(1)
PKBH
(1)
ISEL A1h Interrupt Enable Register CPLEV PRESIT RXIT OELEV OEEN PRESEN RXEN
Table 17. Interrupt SFRs
MnemonicAddName 76543210
Table 18. SCIB SFRs
MnemonicAddName 76543210
SCGT0 B4h
Smart Card Transmit Guard
Time Register 0
GT7 - 0
SCGT1 B5h
Smart Card Transmit Guard
Time Register 1
GT8
SCWT0 B4h
Smart Card Character/ Block
Waiting Time Register 0
WT7 - 0
SCWT1 B5h
Smart Card Character/ Block
Waiting Time Register 1
WT15-8
SCWT2 B6h
Smart Card Character/ Block
Waiting Time Register 2
WT23-16
SCWT3 C1h
Smart Card Character/ Block
Waiting Time Register 3
WT31-24
SCICR B6h
Smart Card Interface Control
Register
RESET CARDDET VCARD1-0 UART WTEN CREP CONV
SCCON ACh
Smart Card Interface
Contacts Register
CLK
CARDC8 CARDC4 CARDIO CARDCLK CARDRST CARDVCC
SCETU0 ACh Smart Card ETU Register 0 ETU7 - 0
SCETU1 ADh Smart Card ETU Register 1 COMP
ETU10-8
SCISR ADh
Smart Card UART Interface
Status Register (Read only)
SCTBE CARDIN
ICARDOVF VCARDOK SCWTO SCTC SCRC SCPE
SCIIR AEh
Smart Card UART Interrupt
Identification Register (Read
only)
SCTBI
ICARDERR VCARDERR
SCWTI SCTI SCRI SCPI
SCIER AEh
Smart Card UART Interrupt
Enable Register
ESCTBI
ICARDER EVCARDER ESCWTI ESCTI ESCRI ESCPI
SCSR ABh
Smart Card Selection
Register
BGTEN CREPSEL ALTKPS1-0 SCCLK1 SCRS
SCIBUF AAh Smart Card Buffer Register
Can store a new byte to be transmitted on the I/O pin when SCTBE is set. Bit ordering on the I/O pin
depends on the convention
Provides the byte received from the I/O pin when SCRI is set. Bit ordering on the I/O pin depends on
the convention.
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