Rainbow-electronics AT89C5122 Manual do Utilizador descarregar pdf (Página 145)

145

AT8xC5122/23

4202E–SCR–06/06

Serial Peripheral Status Register

(SPSTA)

The Serial Peripheral Status Register contains flags to signal the following

conditions:

• Data transfer complete

• Write collision

• Inconsistent logic level on SS

pin (mode fault error)

Reset Value = 00X0XXXXb

Table 86. Serial Peripheral Status and Control Register - SPSTA (C4h)

76543210

SPIF WCOL SSERR MODF - - - -

Bit

Number

Bit

Mnemonic

R/W

Mode Description

7 SPIF R

Serial Peripheral data transfer flag

Clear by hardware to indicate data transfer is in progress or has been

approved by a clearing sequence.

Set by hardware to indicate that the data transfer has been completed.

6WCOLR

Write Collision flag

Cleared by hardware to indicate that no collision has occurred or has

been approved by a clearing sequence.

Set by hardware to indicate that a collision has been detected.

5 SSERR R

Synchronous Serial Slave Error flag

Set by hardware when SS

is modified before the end of a received data.

Cleared by disabling the SPI (clearing SPEN bit in SPCON).

4MODFR

Mode Fault

Cleared by hardware to indicate that the SS

pin is at appropriate logic

level, or has been approved by a clearing sequence.

Set by hardware to indicate that the SS

pin is at inappropriate logic level

3 - 0 - RW

Reserved

The value read from this bit is indeterminate. Do not change these bits.

1 2 ... 140 141 142 143 144 145 146 147 148 149 150 ... 212 213

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