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MAX5887

3.3V, 14-Bit, 500Msps High Dynamic

Performance DAC with Differential LVDS Inputs

8 _______________________________________________________________________________________

Detailed Description

Architecture

The MAX5887 is a high-performance, 14-bit, current-

steering DAC (Figure 1) capable of operating with clock

speeds up to 500MHz. The converter consists of sepa-

rate input and DAC registers, followed by a current-

steering circuit. This circuit is capable of generating

differential full-scale currents in the range of 2mA to

20mA. An internal current-switching network in combi-

nation with external 50Ω termination resistors convert

the differential output currents into a differential output

voltage with a peak-to-peak output voltage range of

0.1V to 1V. An integrated 1.2V bandgap reference, con-

trol amplifier, and user-selectable external resistor

determine the data converter’s full-scale output range.

Reference Architecture and Operation

The MAX5887 supports operation with the on-chip 1.2V

bandgap reference or an external reference voltage

source. REFIO serves as the input for an external, low-

impedance reference source, and as the output if the

DAC is operating with the internal reference. For stable

operation with the internal reference, REFIO should be

decoupled to AGND with a 0.1µF capacitor. Due to its

limited output drive capability, REFIO must be buffered

with an external amplifier, if heavier loading is required.

The MAX5887’s reference circuit (Figure 2) employs a

control amplifier, designed to regulate the full-scale

current I

OUT

for the differential current outputs of the

DAC. Configured as a voltage-to-current amplifier, the

output current can be calculated as follows:

OUT

= 32 ✕ I

REFIO

- 1LSB

OUT

= 32 ✕ I

REFIO

- (I

OUT

/ 2

)

where I

REFIO

is the reference output current (I

REFIO

SET

) and I

OUT

is the full-scale output current of

the DAC. Located between FSADJ and DACREF, R

SET

is the reference resistor, which determines the amplifi-

er’s output current for the DAC. See Table 1 for a matrix

of different I

OUT

and R

SET

selections.

PIN NAME FUNCTION

45 B12N Complementary Data Bit 12

46 B11P Data Bit 11

47 B11N Complementary Data Bit 11

48 B10P Data Bit 10

49 B10N Complementary Data Bit 10

50 B9P Data Bit 9

51 B9N Complementary Data Bit 9

52 B8P Data Bit 8

53 B8N Complementary Data Bit 8

54 B7P Data Bit 7

55 B7N Complementary Data Bit 7

56 B6P Data Bit 6

57 B6N Complementary Data Bit 6

58 B5P Data Bit 5

59 B5N Complementary Data Bit 5

63 B4P Data Bit 4

64 B4N Complementary Data Bit 4

65 B3P Data Bit 3

66 B3N Complementary Data Bit 3

67 B2P Data Bit 2

68 B2N Complementary Data Bit 2

Pin Description (continued)

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 17 18

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