
MAX5290–MAX5295
Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,
Voltage-Output DACs
18 ______________________________________________________________________________________
CONTROL BITS DATA BITS
DATA
C3 C2 C1 C0
D1 D1
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
FUNCTION
LOADING INPUT AND DAC REGISTERS A AND B
DIN 0 0 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load input register A from shift register; DAC
registers are unchanged. DAC outputs are
unchanged.*
DIN 0 0 0 1 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load DAC register A from shift register; input
registers are unchanged. DAC outputs are
updated.*
DIN 0 0 1 0 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load input register A and DAC register A from
shift register. DAC outputs are updated.*
DIN 0 0 1 1 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load input register B; DAC registers are
unchanged. DAC outputs are unchanged.*
DIN 0 1 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load DAC register B from shift register; input
registers are unchanged. DAC outputs are
updated.*
DIN 0 1 0 1 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load input register B and DAC register B from
shift register. DAC outputs are updated.*
DIN 0 1 1 0 X X X X X X X X X X X X Command is ignored.
DIN 0 1 1 1 X X X X X X X X X X X X Command is ignored.
DIN 1 0 0 0 X X X X X X X X X X X X Command is ignored.
DIN 1 0 0 1 X X X X X X X X X X X X Command is ignored.
DIN 1 0 1 0 X X X X X X X X X X X X Command is ignored.
DIN 1 0 1 1 X X X X X X X X X X X X Command is ignored.
DIN 1 1 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load all input registers from the shift register; all
DAC registers are unchanged. All DAC outputs
are unchanged.*
DIN 1 1 0 1 D11 D10 D9 D8 D7 D6 D5 D4 D3/0 D2/0 D1/0 D0/0
Load all input and DAC registers from shift
register. DAC outputs are updated.*
Table 2a. DAC Programming Commands
X = Don’t care.
*For the MAX5292/MAX5293 (10-bit version), D11–D2 are the significant bits and D1 and D0 are sub-bits. For the MAX5294/MAX5295 (8-bit version),
D11–D4 are the significant bits and D3–D0 are sub-bits. Set all sub-bits to zero during the write commands.
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