Rainbow-electronics MAX108 Manual do Utilizador

Consulte online ou descarregue Manual do Utilizador para Sensores Rainbow-electronics MAX108. Rainbow Electronics MAX108 User Manual Manual do Utilizador

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For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
General Description
The MAX108 PECL-compatible, 1.5Gsps, 8-bit analog-
to-digital converter (ADC) allows accurate digitizing of
analog signals with bandwidths to 2.2GHz. Fabricated
on Maxim’s proprietary advanced GST-2 bipolar
process, the MAX108 integrates a high-performance
track/hold (T/H) amplifier and a quantizer on a single
monolithic die.
The innovative design of the internal T/H, which has an
exceptionally wide 2.2GHz full-power input bandwidth,
results in high performance (typically 7.5 effective bits)
at the Nyquist frequency. A fully differential comparator
design and decoding circuitry reduce out-of-sequence
code errors (thermometer bubbles or sparkle codes)
and provide excellent metastable performance. Unlike
other ADCs that can have errors resulting in false full-
or zero-scale outputs, the MAX108 limits the error mag-
nitude to 1LSB.
The analog input is designed for either differential or
single-ended use with a ±250mV input voltage range.
Dual, differential, positive-referenced emitter-coupled
logic (PECL)-compatible output data paths ensure easy
interfacing and include an 8:16 demultiplexer feature
that reduces output data rates to one-half the sampling
clock rate. The PECL outputs can be operated from any
supply between +3V to +5V for compatibility with +3.3V
or +5V referenced systems. Control inputs are provided
for interleaving additional MAX108 devices to increase
the effective system sampling rate.
The MAX108 is packaged in a 25mm x 25mm, 192-con-
tact Enhanced Super Ball-Grid Array (ESBGA™) and is
specified over the commercial (0°C to +70°C) tempera-
ture range. For pin-compatible, lower speed versions of
the MAX108, see the MAX104 (1Gsps) and the MAX106
(600Msps) data sheets.
Applications
Digital RF/IF Signal Processing
Direct RF Downconversion
High-Speed Data Acquisition
Digital Oscilloscopes
High-Energy Physics
Radar/ECM Systems
ATE Systems
Features
1.5Gsps Conversion Rate
2.2GHz Full-Power Analog Input Bandwidth
7.5 Effective Bits at f
IN
= 750MHz (Nyquist
Frequency)
±0.25LSB INL and DNL
50 Differential Analog Inputs
±250mV Input Signal Range
On-Chip, +2.5V Precision Bandgap Voltage
Reference
Latched, Differential PECL Digital Outputs
Selectable 8:16 Demultiplexer
Internal Demux Reset Input with Reset Output
192-Contact ESBGA Package
Pin Compatible with MAX104 (1Gsps) and
MAX106 (600Msps)
MAX108
±5V, 1.5Gsps, 8-Bit ADC with
On-Chip 2.2GHz Track/Hold Amplifier
________________________________________________________________
Maxim Integrated Products
1
19-1492; Rev 0; 9/99
PART
MAX108CHC 0°C to +70°C
TEMP. RANGE PIN-PACKAGE
192 ESBGA
EVALUATION KIT
AVAILABLE
Ordering Information
ESBGA
TOP VIEW
MAX108
Typical Operating Circuit appears at end of data sheet.
192-Contact ESBGA
Ball Assignment Matrix
ESBGA is a trademark of Amkor/Anam.
PCB land pattern appears at end of data sheet.
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Resumo do Conteúdo

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For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.For small orders, phone 1-800-835-8769.General DescriptionThe MAX108 PECL-

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Principle of OperationThe MAX108’s flash or parallel architecture providesthe fastest multibit conversion of all common integratedADC designs. The key

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MAX108REFOUT to REFIN. This connects the reference outputto the positive input of the reference buffer. The buffer’snegative input is internally conne

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Non-Demultiplexed DIV1 ModeThe MAX108 may be operated at up to 750Msps innon-demultiplexed DIV1 mode (Table 2). In this mode,the internal demultiplexe

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MAX108Decimation DIV4 ModeThe MAX108 also offers a special decimated, demulti-plexed output (Figure 8) that discards every other inputsample and outpu

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In a typical single-ended configuration, the analoginput signal (Figure 10a) enters the T/H amplifier stageat the in-phase input (VIN+), while the inv

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MAX108Offset AdjustThe MAX108 provides a control input (VOSADJ) to com-pensate for system offsets. The offset adjust input is aself-biased voltage div

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formance specifications are determined by a single-ended clock drive of +4dBm (500mV clock signalamplitude). To avoid saturation of the input amplifie

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MAX108AC-Coupling Clock InputsThe clock inputs CLK+ and CLK- can be driven withPECL logic if the clock inputs are AC-coupled. Underthis condition, con

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Reset PipelineThe next section in the reset signal path is the resetpipeline. This block adds clock cycles of latency to thereset signal to match the

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MAX108Reset OutputFinally, the reset signal is presented in differential PECLformat to the last block of the reset signal path.RSTOUT+/RSTOUT- output

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asserted, the auxiliary port contained “even” sampleswhile the primary port contained “odd” samples. Afterthe RSTOUT is deasserted (which marks the st

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MAX108current with an ammeter (which shuts off the internalcatch diodes) referenced to GNDI. The die temperaturein °C is then calculated by the expres

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Thermal PerformanceThe MAX108 has been modeled to determine the ther-mal resistance from junction to ambient. Table 7 lists the ADC’s thermal performa

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MAX108All supplies should be decoupled with large tantalum orelectrolytic capacitors at the point they enter the PCB.For best performance, bypass all

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Bit Error Rates Errors resulting from metastable states may occur whenthe analog input voltage (at the time the sample istaken) falls close to the dec

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MAX108±5V, 1.5Gsps, 8-Bit ADC with On-Chip 2.2GHz Track/Hold AmplifierMaxim cannot assume responsibility for use of any circuitry other than circuitry

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