Rainbow-electronics MAX1301 Manual do Utilizador Página 1

General DescriptionThe MAX1300/MAX1301 multirange, low-power, 16-bit,successive-approximation, analog-to-digital converters(ADCs) operate from a singl

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MAX1300/MAX13018-/4-Channel, ±12V Multirange Inputs, Serial 16-Bit ADCs_______________________________________________________________________________

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Detailed DescriptionThe MAX1300/MAX1301 multirange, low-power, 16-bitsuccessive-approximation ADCs operate from a single+5V supply and have a separate

MAX1300/MAX1301Power SuppliesTo maintain a low-noise environment, the MAX1300 andMAX1301 provide separate power supplies for eachsection of circuitry.

Single-ended conversions are internally referenced toAGND1 (Tables 3 and 4). In differential mode, IN+ andIN- are selected according to Tables 3 and 5

MAX1300/MAX1301Figure 8 illustrates the software-selectable differentialanalog input voltage range that produces a valid digitaloutput. Each analog in

Figure 6. Simplified Analog Input CircuitMAX1300MAX1301R2R1VSJ*RSOURCEANALOGSIGNALSOURCER2R1VSJ*RSOURCEANALOGSIGNALSOURCEIN_+IN_+*MINIMIZE RSOURCE TO

MAX1300/MAX1301Differential Common-Mode RangeThe MAX1300/MAX1301 differential common-moderange (VCMDR) must remain within -14V to +10V to obtainvalid

Digital InterfaceThe MAX1300/MAX1301 feature a serial interface that iscompatible with SPI/QSPI and MICROWIRE devices.DIN, DOUT, SCLK, CS, and SSTRB f

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Start BitCommunication with the MAX1300/MAX1301 is accom-plished using the three input data word formats shownin Table 3. Each input data word begins

MAX1300/MAX1301Mode ControlThe MAX1300/MAX1301 contain one byte-wide mode-control register. The timing diagram of Figure 15 showshow to use the mode-c

• User supplies one byte of SCLK, then drives CShigh to relieve processor load while the ADCconverts• After SSTRB transitions high, the user suppliest

MAX1300/MAX1301External Acquisition Mode (Mode 1)The slowest maximum throughput rate is achieved withthe external acquisition method. SCLK controls th

• External-Acquisition-Mode Control Byte• Internal-Clock-Mode Control Byte• Reset Byte• Partial Power-Down-Mode Control ByteThis prevents the MAX1300/

MAX1300/MAX1301Bridge ApplicationThe MAX1300/MAX1301 convert 1kHz signals moreaccurately than a similar sigma-delta converter thatmight be considered

Differential Nonlinearity (DNL)DNL is the difference between an actual step width andthe ideal value of 1 LSB. A DNL error specification ofgreater tha

MAX1300/MAX1301Unipolar Offset Error-FSR to 0VWhen a zero-scale analog input voltage is applied tothe converter inputs, the digital output is all ones

Effective Number of Bits (ENOB)ENOB indicates the global accuracy of an ADC at aspecific input frequency and sampling rate. With aninput range equal t

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MAX1300/MAX13018-/4-Channel, ±12V Multirange Inputs, Serial 16-Bit ADCsMaxim cannot assume responsibility for use of any circuitry other than circuitr

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MAX1300/MAX13018-/4-Channel, ±12V Multirange Inputs, Serial 16-Bit ADCs_______________________________________________________________________________

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MAX1300/MAX13018-/4-Channel, ±12V Multirange Inputs, Serial 16-Bit ADCs_______________________________________________________________________________

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MAX1300/MAX13018-/4-Channel, ±12V Multirange Inputs, Serial 16-Bit ADCs_______________________________________________________________________________