
MAX1211
65Msps, 12-Bit, IF Sampling ADC
______________________________________________________________________________________ 21
GRAY CODE
OUTPUT CODE
(G/TT
TT
= 1)
TWO’S COMPLEMENT
OUTPUT CODE
(G/TT
TT
= 0)
BINARY
D11 D0
DOR
HEXADECIMAL
EQUIVALENT
EQUIVALENT
OF
D11 D0
(CODE
10
)
BINARY
D11 D0
DOR
HEXADECIMAL
EQUIVALENT
EQUIVALENT
OF
D11 D0
(CODE
10
)
V
IN P
- V
IN N
V
REFP
= 2.162 V
1
0111 1111 1111 1
0x7FF +2047
>+1.0235V
(DATA OUT OF
RANGE)
0
0111 1111 1111 0
0
0111 1111 1110 0
0
0000 0000 0010 0
0
0000 0000 0001 0
0
0000 0000 0000 0
0
1111 1111 1111 0
0
1111 1111 1110 0
0
1000 0000 0001 0
0
1000 0000 0000 0
1
1000 0000 0000 1
0x800 -2048
<-1.0240V
(DATA OUT OF
RANGE)
(
Table 2. Output Codes vs. Input Voltage
DAV
D0–D11
(V
REFP
- V
REFN
)
(V
REFN
- V
REFP
)
N + 4
N + 5
N + 6
N - 2
N - 3
DOR
8.5 CLOCK-CYCLE DATA LATENCY
DIFFERENTIAL ANALOG INPUT (INP - INN)
CLKN
CLKP
t
AD
t
CL
t
CH
t
SETUP
t
SETUP
t
HOLD
t
HOLD
t
DAV
N N + 1 N + 2 N + 3 N + 5 N + 6 N + 7N - 1N - 2N - 3 N + 9N + 8N + 4
N
N + 1
N + 2
N + 3
N + 7
N + 8
N + 9
N - 1
Figure 5. System Timing Diagram
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