Rainbow-electronics MAX1033 Manual do Utilizador

General DescriptionThe MAX1032/MAX1033 multirange, low-power, 14-bit,successive-approximation, analog-to-digital converters(ADCs) operate from a singl

MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs10 ____________________________________________________________________________

MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs_______________________________________________________________________________

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Detailed DescriptionThe MAX1032/MAX1033 multirange, low-power, 14-bitsuccessive-approximation ADCs operate from a single+5V supply and have a separate

MAX1032/MAX1033Power SuppliesTo maintain a low-noise environment, the MAX1032/MAX1033 provide separate power supplies for eachsection of circuitry. Ta

As a result, the analog input impedance is relativelyconstant over input voltage as shown in Figure 5.Single-ended conversions are internally referenc

MAX1032/MAX1033Figure 8 illustrates the software-selectable differentialanalog input voltage range that produces a valid digitaloutput. Each analog in

Figure 6. Simplified Analog Input CircuitMAX1032MAX1033R2R1VSJ*RSOURCEANALOGSIGNALSOURCER2R1VSJ*RSOURCEANALOGSIGNALSOURCEIN_+IN_+*MINIMIZE RSOURCE TO

Differential Common-Mode RangeThe MAX1032/MAX1033 differential common-moderange (VCMDR) must remain within -14V to +10V toobtain valid conversion resu

MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs_______________________________________________________________________________

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Start BitCommunication with the MAX1032/MAX1033 is accom-plished using the three input data word formats shownin Table 3. Each input data word begins

Mode ControlThe MAX1032/MAX1033 contain one byte-wide mode-control register. The timing diagram of Figure 15 showshow to use the mode-control byte, an

• User supplies one byte of SCLK, then drives CShigh to relieve processor load while the ADCconverts• After SSTRB transitions high, the user suppliest

External Acquisition Mode (Mode 1)The slowest maximum throughput rate is achieved withthe external acquisition method. SCLK controls the acqui-sition

This prevents the MAX1032/MAX1033 from inadvertent-ly exiting full power-down mode because of a CS glitchin a noisy digital environment.Power-On Reset

Bridge ApplicationThe MAX1032/MAX1033 convert 1kHz signals moreaccurately than a similar sigma-delta converter thatmight be considered in bridge appli

Differential Nonlinearity (DNL)DNL is the difference between an actual step width andthe ideal value of 1 LSB. A DNL error specification ofgreater tha

Unipolar Offset Error-FSR to 0VWhen a zero-scale analog input voltage is applied tothe converter inputs, the digital output is all ones(0x3FFF). Ideal

Effective Number of Bits (ENOB)ENOB indicates the global accuracy of an ADC at aspecific input frequency and sampling rate. With aninput range equal t

MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs_______________________________________________________________________________

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MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCsMaxim cannot assume responsibility for use of any circuitry other than circuitr

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MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs_______________________________________________________________________________

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MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs_______________________________________________________________________________

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MAX1032/MAX10338-/4-Channel, ±12V Multirange Inputs, Serial 14-Bit ADCs_______________________________________________________________________________