Mode Control
The MAX1032/MAX1033 contain one byte-wide mode-
control register. The timing diagram of Figure 15 shows
how to use the mode-control byte, and the mode-con-
trol byte format is shown in Table 7. The mode-control
byte is used to select the conversion method and to
control the power modes of the MAX1032/MAX1033.
Selecting the Conversion Method
The conversion method is selected using the mode-
control byte (see the Mode Control section), and the con-
version is initiated using a conversion-start command
(Table 3, and Figures 2, 3, and 4).The MAX1032/
MAX1033 convert analog signals to digital data using one
of three methods:
• External Clock Mode, Mode 0 (Figure 2)
• Highest maximum throughput (see the Electrical
Characteristics table)
• User controls the sample instant
• CS remains low during the conversion
• User supplies SCLK throughout the ADC con-
version and reads data at DOUT
• External Acquisition Mode, Mode 1 (Figure 3)
• Lowest maximum throughput (see the Electrical
Characteristics table)
• User controls the sample instant
• User supplies two bytes of SCLK, then drives
CS high to relieve processor load while the
ADC converts
• After SSTRB transitions high, the user supplies
two bytes of SCLK and reads data at DOUT
• Internal Clock Mode, Mode 2 (Figure 4)
• High maximum throughput (see the Electrical
Characteristics table)
• The internal clock controls the sampling instant
MAX1032/MAX1033
8-/4-Channel, ±12V Multirange Inputs,
Serial 14-Bit ADCs
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