Rainbow-electronics ATmega64L Manual do Utilizador Página 226

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226
ATmega16(L)
2466B09/01
Figure 118. Additional Scan Signal for the Two-wire Interface
Scanning the RESET Pin The RESET pin accepts 5V active low logic for standard reset operation, and 12V active
high logic for High Voltage Parallel programming. An observe-only cell as shown in Fig-
ure 119 is inserted both for the 5V reset signal; RSTT, and the 12V reset signal;
RSTHV.
Figure 119. Observe-only Cell
Scanning the Clock Pins The AVR devices have many clock options selectable by fuses. These are: Internal RC
Oscillator, External RC, External Clock, (High Frequency) Crystal Oscillator, Low Fre-
quency Crystal Oscillator, and Ceramic Resonator.
Figure 120 shows how each oscillator with external connection is supported in the scan
chain. The Enable signal is supported with a general boundary-scan cell, while the oscil-
lator/clock output is attached to an observe-only cell. In addition to the main clock, the
timer oscillator is scanned in the same way. The output from the internal RC-Oscillator is
not scanned, as this oscillator does not have external connections.
Pxn
PUExn
ODxn
IDxn
TWIEN
OCxn
Slew-rate Limited
SRC
0
1
DQ
From
Previous
Cell
ClockDR
ShiftDR
To
Next
Cell
From System Pin
To System Logic
FF1
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