Rainbow-electronics ATmega161L Manual do Utilizador descarregar pdf (Página 102)

102

ATmega161(L)

1228C–AVR–08/02

Port D Schematics Note that all port pins are synchronized. The synchronization latches are, however, not

shown in the figures.

Figure 64. Port D Schematic Diagram (Pin PD0)

Figure 65. Port D Schematic Diagram (Pin PD1)

TA BUS

RESET

MOS

PULL-

PD0

RXD0

RXEN0

WP:

WD:

RL:

RP:

RD:

RXD0:

RXEN0:

WRITE PORTD

WRITE DDRD

READ PORTD LATCH

READ PORTD PIN

READ DDRD

UART0 RECEIVE DATA

UART0 RECEIVE ENABLE

DDD0

PORTD0

TA BUS

RESET

MOS

PULL-

PD1

WP:

WD:

RL:

RP:

RD:

TXD0:

TXEN0:

WRITE PORTD

WRITE DDRD

READ PORTD LATCH

READ PORTD PIN

READ DDRD

UART0 TRANSMIT DATA

UART0 TRANSMIT ENABLE

DDD1

PORTD1

TXEN0

TXD0

1 2 ... 97 98 99 100 101 102 103 104 105 106 107 ... 158 159

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