Rainbow-electronics ADC10738 Manual do Utilizador descarregar pdf (Página 7)

Electrical Characteristics (Continued)

The following specifications apply for V

5.0 V

REF

2.5 V

REF

GND, V

2.5V for

Signed Characteristics, V

GND for Unsigned Characteristics and f

CLK

2.5 MHz unless otherwise specified. Boldface

limits apply for T

MIN

to T

MAX

; all other limits T

C. (Note 16)

Symbol Parameter Conditions

Typical Limits Units

(Note 11) (Note 12) (Limits)

AC CHARACTERISTICS

CLK

Clock Frequency 3.0 2.5 MHz(max)

5 kHz(min)

Clock Duty Cycle 40 %(min)

60 %(max)

Conversion Time 12 12 Clock

Cycles

5 5 ms(max)

Acquisition Time 4.5 4.5 Clock

Cycles

2 2 ms(max)

SCS

CS Set-Up Time, Set-Up Time from Falling Edge of 14 30 ns(min)

CS to Rising Edge of Clock

(1 t

CLK

(1 t

CLK

(max)

14 ns)

30 ns)

SDI

DI Set-Up Time, Set-Up Time from Data Valid on

16 25 ns(min)

DI to Rising Edge of Clock

HDI

DI Hold Time, Hold Time of DI Data from Rising

2 25 ns(min)

Edge of Clock to Data not Valid on DI

DO Access Time from Rising Edge of CLK When

30 50 ns(min)

is ‘‘Low’’ during a Conversion

DO or SARS Access Time from CS, Delay from

30 70 ns(max)

Falling Edge of CS

to Data Valid on DO or SARS

DSARS

Delay from Rising Edge of Clock to Falling Edge of

100 200 ns(max)

SARS when CS

is ‘‘Low’’

HDO

DO Hold Time, Hold Time of Data on DO after

20 35 ns(max)

Falling Edge of Clock

DO Access Time from Clock, Delay from Falling

40 80 ns(max)

Edge of Clock to Valid Data of DO

Delay from Rising Edge of CS to DO or SARS

40 50 ns(max)

TRI-STATE

DCS

Delay from Falling Edge of Clock to Falling Edge of

20 30 ns(min)

CS(H)

CS ‘‘HIGH’’ Time for A/D Reset after Reading of

1 CLK 1 CLK cycle(min)

Conversion Result

CS(L)

ADC10731 Minimum CS ‘‘Low’’ Time to Start a

1 CLK 1 CLK cycle(min)

Conversion

Time from End of Conversion to CS Going ‘‘Low’’ 5 CLK 5 CLK cycle(min)

Delay from Power-Down command to 10% of

1 ms

Operating Current

Delay from Power-Up Command to Ready to Start

a New Conversion

Capacitance of Logic Inputs 7 pF

OUT

Capacitance of Logic Outputs 12 pF

1 2 3 4 5 6 7 8 9 10 11 12 ... 29 30

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