Rainbow-electronics T89C51AC2 Manual do Utilizador descarregar pdf (Página 93)

T89C51AC2

Rev. B – 19-Dec-01

Table 56. IPH1 Register

IPH1 (S:FFh)

Interrupt high priority Register 1

Reset Value = XXXX X000b

76543210

- - - - - PADCH -

Bit

Number

Bit

Mnemonic Description

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

1 PADCH

ADC Interrupt Priority level most significant bit

PADCH

PADCL Priority level

00Lowest

11Highest

1 2 ... 88 89 90 91 92 93 94 95 96 97 98 ... 109 110

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