
33
11050A–PMAAC–07-Apr-10
AT73C246
When RUN state is reached from the STANDBY state, the power supplies are sequentially
started-up according to the Figure 11-6.
Figure 11-6. AT73C246 - STANDBY to RUN state Supplies Start-Up timing diagram.
Note: 1. VDDx activity during STANDBY state is set by register PMU_STANDBY_SUPPLIES.
11.4.3 STANDBY STATE
When AT73C246 is in STANDBY state:
•V
BACKUP
is ON.
•VDD
{0,1,2,3}
are ON or OFF according to the status in register 0x03
(PMU_STANDBY_SUPPLIES)
•VDD
4
is ON or OFF according to the status in register 0x0A (VDD4_CTRL)
• Audio function is OFF
• ADC function is ON or OFF according to the status in register 0x30 (ADC_CTRL)
• RSTB pin is forced to ground.
• TWI pins are ignored to prevent TWI registers from corruption
• Led pin is driven according to register PMU_LED (0x0B)
To reach the STANDBY state, the appropriate power supplies are shut down as described in the
Figure 11-7 on page 34.
Table 11-5. STANDBY to RUN state timing table
Symbol Parameter Comments Min Typ Max Units
T
ON_SYS
Start-up Time
Time from validated WAKEUP event (end of debounce
time when applicable) to VDD2 or VDD3 power on.
810 900 990 µs
T
PFM
PFM/PWM Switching
time
Time from validated WAKEUP event (end of debounce
time when applicable) to PFM/PWM switching if
applicable.
420 470 520 µs
T
ON_VDDx
VDDx Start-up Time
VDDx is OFF during STANDBY state
(1)
5.2 5.4 5.7 ms
VDDx is ON during STANDBY state
(1)
58 62 66 µs
T
RESET
All Regulators ON To
RSTB High
30.4 32 33.6 ms
SEQUENCE A SEQUENCE B
STANDBY
S TATE
SUPPLIES START UP
TON_SYS
RUN STATE
WAKEUP
EVENT
V
DD3
(3.3V)
TON_VDD3
TON_VDD0
TON_VDD1
V
DD2
(1V)
3.3V
1.85V
1.2V
1V
TON_VDD2
RSTB
VPAD LEVEL
TRESET
V
DD3
ON
or OFF
STANDBY
S TATE
SUPPLIES START UP
TON_SYS
RUN STATE
WAKEUP
EVENT
V
DD2
(1V)
TON_VDD2
TON_VDD0
TON_VDD1
V
DD3
(3.3V)
1V
1.85V
1.2V
3.3V
TON_VDD3
RSTB
VPAD LEVEL
TRESET
V
DD3
ON
or OFF
V
DD0
(1.85V)
V
DD1
(1.2V)
PFM
TPFM
PFM
V
DD0
(1.85V)
V
DD1
(1.2V)
PFM
TPFM
PFM
PWM
V
DD0
PWM
V
DD1
PWM
V
DD0
PWM
V
DD1
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