
DS1682
15 of 15
Figure 10. TOTAL TIME-OF-USE APPLICATION WITH SLOW V
CC
SLEW RATE
Figure 10 shows the DS1682 in a total time-of-use application with power that can be removed at the
same time as the end of the event. In this application, the V
CC
slew rate at power-down is slow with
respect to t
EW
. The external RST IC ends the event as V
CC
begins to drop. V
CC
must remain above 2.5V
until the end of t
EW
.
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