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DS1375

2-Wire Digital Input RTC with Alarm

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Table 2. Alarm Mask Bits

ALARM 1 REGISTER MASK

BITS (BIT 7)

DY/DT

A1M4 A1M3 A1M2 A1M1

ALARM RATE

X 1111

Alarm once per

second

X 1110

Alarm when seconds

match

X 1100

Alarm when minutes

and seconds match

X 1000

Alarm when hours,

minutes, and seconds

match

0 0000

Alarm when date,

hours, minutes, and

seconds match

1 0000

Alarm when day,

hours, minutes, and

seconds match

ALARM 2 REGISTER

MASK BITS (BIT 7)

DY/DT

A2M4 A2M3 A2M2

ALARM RATE

X 111

Alarm once per minute

(00 seconds of every min)

X 110Alarm when minutes match

X 100

Alarm when hours and

minutes match

0 000

Alarm when date, hours, and

minutes match

1 000

Alarm when day, hours, and

minutes match

The countdown chain is reset whenever the seconds

edge from the DS1375. Once the countdown chain is

reset, to avoid rollover issues the remaining time and

date registers must be written within 1 second. The 1Hz

square-wave output, if enabled, transitions high 500ms

after the seconds data transfer, provided the clock

input is already being driven.

Alarms

The DS1375 contains two time-of-day/date alarms.

Alarm 1 can be set by writing to registers 07h–0Ah.

Alarm 2 can be set by writing to registers 0Bh–0Dh.

The alarms can be programmed (by the alarm enable

and INTCN bits of the control register) to activate the

SQW/INT output on an alarm match condition. Bit 7 of

the time-of-day/date alarm registers are mask bits

(Table 2). When all the mask bits for each alarm are

logic 0, an alarm only occurs when the values in the

timekeeping registers match the corresponding values

stored in the time-of-day/date alarm registers. The

alarms can also be programmed to repeat every sec-

ond, minute, hour, day, or date. Table 2 shows the pos-

sible settings. Configurations not listed in the table

result in illogical operation.

The DY/DT bits (bit 6 of the alarm day/date registers)

control whether the alarm value stored in bits 0–5 of

that register reflects the day of the week or the date of

the month. If DY/DT is written to logic 0, the alarm is the

result of a match with date of the month. If DY/DT is

written to logic 1, the alarm is the result of a match with

day of the week.

When the RTC register values match alarm register set-

tings, the corresponding alarm flag A1F or A2F bit is

set to logic 1. If the corresponding alarm interrupt

enable A1IE or A2IE is also set to logic 1, and the

INTCN bit is set to logic 1, the alarm condition activates

the SQW/INT signal. The match is tested on the once-

per-second update of the time and date registers.

Special Purpose Registers

The DS1375 has two additional registers (control and

status) that control the RTC, alarms, and square-wave

output.

1 2 3 4 5 6 7 8 9 10 11

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