Rainbow-electronics MAX9491 Manual do Utilizador Página 8

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MAX9491
Factory Programmable Single PLL
Clock Generator
8 _______________________________________________________________________________________
Board Layout Considerations and
Bypassing
The MAX9491’s high-frequency oscillator requires
proper layout to ensure stability. For best performance,
place components as close as possible to the device.
Digital or AC transient signals on GND can create noise
at the clock output. Return GND to the highest quality
ground available. Bypass each V
DD
and V
DDA
with a
0.1µF capacitor, placed as close as possible to the
device. Careful PC board ground layout minimizes
crosstalk between the output and digital inputs.
Chip Information
PROCESS: CMOS
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