
Features• Minimal External Circuitry Requirements, No RF Components on the PC Board Except Matching to the Receiver Antenna• High Sensitivity, Especia
10U3741BM 4662B–RKE–10/04Polling Circuit and Control LogicThe receiver is designed to consume less than 1 mA while being sensitive to signals from a
11 U3741BM4662B–RKE–10/04• USA Applications (fXTO = 4.90625 MHz, MODE = L, TClk = 2.0383 µs)• Europe Applications (fXTO = 6.76438 MHz, MODE = H, TC
12U3741BM 4662B–RKE–10/04XSleepStd = 1 implies the standard extension factor. The sleep time is always extended.XSleepTemp = 1 implies the temporary
13 U3741BM4662B–RKE–10/04Figure 9. Timing Diagram for a Completely Successful Bit Check Bit Check Mode In bit check mode, the incoming data stream i
14U3741BM 4662B–RKE–10/04The bit check limits are determined by means of the formula below:TLim_min = Lim_min × TXClk TLim_max = (Lim_max –1) × TXC
15 U3741BM4662B–RKE–10/04Figure 13. Timing Diagram for Failed Bit Check (Condition: CV_Lim ≥ Lim_max) Duration of the Bit Check If no transmitter si
16U3741BM 4662B–RKE–10/04Figure 14. Synchronization of the Demodulator Output Figure 15. Debouncing of the Demodulator Output Figure 16. Steady L
17 U3741BM4662B–RKE–10/04If the receiver is set to polling mode via pin ENABLE, an ‘L’ pulse (TDoze) must be issued at that pin. Figure 18 illustrate
18U3741BM 4662B–RKE–10/04Table 4 and the following illustrate the effect of the individual configuration words. The default configuration is highligh
19 U3741BM4662B–RKE–10/04Table 5. Effect of the Configuration Word NBitcheckNBitcheckNumber of Bits to be CheckedBitChk1 BitChk000 001 31 0 6 (Defau
2U3741BM 4662B–RKE–10/04System Block Diagram Block Diagram DemodControlU3741BM1...3U2741BAntennaAntennaUHF ASK/FSKRemote control transmitterUHF ASK/F
20U3741BM 4662B–RKE–10/04Conservation of the Register InformationThe U3741BM has an integrated power-on reset and brown-out detection circuitry to pr
21 U3741BM4662B–RKE–10/04•fRM is lower than the lowest feasible frequency of a data signal. By this means, RM cannot be misinterpreted by the connect
22U3741BM 4662B–RKE–10/04To start programming, the serial data line DATA is pulled to ‘L’ for the time period t1 by the microcontroller. When DATA ha
23 U3741BM4662B–RKE–10/04Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the devi
24U3741BM 4662B–RKE–10/04Receiving ModeIntermediate frequencyMODE=0 (USA) MODE=1 (Europe)fIF1.0 1.0fXTO × 64/314fXTO × 64/432.92MHzMHzBaud rate ran
25 U3741BM4662B–RKE–10/04Delay until the program window starts (Figure 17, Figure 20)t4 131 129 63.5 × TClkµsProgramming window (Figure 17, Figure 2
26U3741BM 4662B–RKE–10/04Maximum input levelInput matched according to Figure 4, BER ≤ 10-3, ASK modePin_max-28-20dBmdBmLocal OscillatorOperating fr
27 U3741BM4662B–RKE–10/04Input sensitivity ASK 600 kHz IF filter BR_Range0 -108 -110 -112 dBmInput sensitivity ASK 600 kHz IF filter BR_Range1 -106.5
28U3741BM 4662B–RKE–10/04Lower cut-off frequency of the data filter fcu_DF0.11 0.16 0.20 kHzRecommended CDEM for best performanceASK mode BR_Range0
29 U3741BM4662B–RKE–10/04Reduced sensitivity variation for different values of RSenseValues relative to RSense = 56 kΩ RSense = 56 kΩ RSense = 68 k
3 U3741BM4662B–RKE–10/04Pin Configuration Figure 1. Pinning SO20 SENSFSK/ASKCDEMAVCCAGNDDGNDMIXVCCLNAGNDLNA_INNCDATAENABLETESTPOUTMODEDVCCXTOLFGNDLF
30U3741BM 4662B–RKE–10/04Package Information Ordering InformationExtended Type Number Package RemarksU3741BM-P2FL SO20 2: IF bandwidth of 300 kHz, tu
31 U3741BM4662B–RKE–10/04Revision History Please note that the following page numbers referred to in this section refer to the specific revision ment
Printed on recycled paper.4662B–RKE–10/04Disclaimer: The information in this document is provided in connection with Atmel products. No license, expr
4U3741BM 4662B–RKE–10/04RF Front End The RF front end of the receiver is a heterodyne configuration that converts the input signal into a 1-MHz IF si
5 U3741BM4662B–RKE–10/04To determine fLO, the construction of the IF filter must be considered at this point. The nominal IF frequency is fIF = 1 MHz
6U3741BM 4662B–RKE–10/04Figure 3. Input Matching Network with SAW Filter Figure 4. Input Matching Network without SAW Filter Please note that for a
7 U3741BM4662B–RKE–10/04Analog Signal ProcessingIF Amplifier The signals coming from the RF front end are filtered by the fully integrated 4th-order
8U3741BM 4662B–RKE–10/04FSK/ASK Demodulator and Data FilterThe signal coming from the RSSI amplifier is converted into the raw data signal by the ASK
9 U3741BM4662B–RKE–10/04Receiving CharacteristicsThe RF receiver U3741BM can be operated with and without a SAW front-end filter. In a typical automo
Comentários a estes Manuais