Rainbow-electronics ATF22V10CQ Manual do Utilizador

1Features• Industry-standard Architecture– Low-cost, Easy-to-use Software Tools• High-speed, Electrically Erasable Programmable Logic Devices– 5 ns Ma

10ATF22V10C(Q)0735P–PLD–01/02ATF22V10C/CQ SUPPLY CURRENT VS.SUPPLY VOLTAGE (TA= 25°C)0.020.040.060.080.0100.0120.0140.04.50 4.75 5.00 5.25 5.50SUPPLY

11ATF22V10C(Q)0735P–PLD–01/02ATF22V10C/CQ NORMALIZED TPDVS. VCC0.80.91.01.11.24.50 4.75 5.00 5.25 5.50SUPPLY VOLTAGE (V)NORMALIZED TPDATF22V10C/CQ NOR

12ATF22V10C(Q)0735P–PLD–01/02ATF22V10C/CQ DELTA TCOVS.OUTPUT LOADING0.01.02.03.04.05.06.07.08.050 100 150 200 250 300NUMBER OF OUTPUTS LOADINGDELTA TC

13ATF22V10C(Q)0735P–PLD–01/02Using “C” Product for IndustrialTo use commercial product for Industrial temperature ranges, down-grade one speed grade f

14ATF22V10C(Q)0735P–PLD–01/02Packaging Information28J–PLCC1.14(0.045) X 45˚PIN NO. 1IDENTIFIER1.14(0.045) X 45˚0.51(0.020)MAX0.318(0.0125)0.191(0.0075

15ATF22V10C(Q)0735P–PLD–01/0224P3 – PDIP 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. 24P3, 24-lead (0.300"/7.62 mm Wide) Pla

16ATF22V10C(Q)0735P–PLD–01/0224S – SOIC 0.51 (0.020) 0.33 (0.013)7.60(0.2992)7.40(0.2914) 10.65(0.419)10.00(0.394)2.65(0.1043)2.35(0.0926)1.27(0.050)

17ATF22V10C(Q)0735P–PLD–01/0224X – TSSOP0.30(0.012)0.19(0.007)4.48(0.176)4.30(0.169)6.50(0.256)6.25(0.246)0.65(0.0256)BSC7.90(0.311)7.70(0.303)0.15(0.

Printed on recycled paper.© Atmel Corporation 2002.Atmel Corporation makes no warranty for the use of its products, other than those expressly contain

2ATF22V10C(Q)0735P–PLD–01/02Logic DiagramDescriptionThe ATF22V10C is a high-performance CMOS (electrically erasable) programmablelogic device (PLD) th

3ATF22V10C(Q)0735P–PLD–01/02Note: 1. These device types will create a JEDEC file which when programmed in ATF22V10C devices will enable the power-down

4ATF22V10C(Q)0735P–PLD–01/02AC Waveforms(1)Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise

5ATF22V10C(Q)0735P–PLD–01/02Notes: 1. Output data is latched and held.2. High-Z outputs remain high-Z.3. Clock and input transitions are ignored.Input

6ATF22V10C(Q)0735P–PLD–01/02Power-up Reset The registers in the ATF22V10Cs are designed to reset during power-up. At a pointdelayed slightly from VCCc

7ATF22V10C(Q)0735P–PLD–01/02Input and I/O Pin-keeper CircuitsThe ATF22V10C contains internal input and I/O pin-keeper circuits. These circuits allowea

8ATF22V10C(Q)0735P–PLD–01/02Power-down Mode The ATF22V10C includes an optional pin-controlled power-down feature. When thismode is enabled, the PD pin

9ATF22V10C(Q)0735P–PLD–01/02Functional Logic Diagram ATF22V10C