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ATF1504ASV(L)

1409H–PLD–09/02

Description The ATF1504ASV(L) is a high-performance, high-density complex programmable logic

device (CPLD) that utilizesAtmel’sproven electrically-erasable memory technology.

With 64 logic macrocells and up to 68 inputs, it easily integrateslogicfromseveral TTL,

SSI, MSI, LSI and classic PLDs. The ATF1504ASV(L)’s enhanced routing switch matri-

cesincrease usable gate count and the odds of successful pin-lockeddesign

modifications.

The ATF1504ASV(L) has up to 68 bi-directional I/O pins and four dedicated input pins,

depending on the type of device package selected. Each dedicatedpincanalsoserve

as a global control signal, register clock, registerreset or output enable. Each of these

control signals can be selectedforuse individually within each macrocell.

Each of the 64 macrocells generates a buriedfeedback that goestothe global bus.

Each input and I/Opinalsofeeds into the global bus. The switch matrix in each logic

block thenselects 40 individual signals from the global bus. Each macrocell also gener-

atesafoldbacklogicterm that goestoaregional bus. Cascade logic between

macrocells in the ATF1504ASV(L) allows fast, efficient generation of complex logic func-

tions. The ATF1504ASV(L) contains four such logic chains, each capable of creating

sum term logic with a fan-in of up to 40 product terms.

The ATF1504ASV(L)macrocell, shown in Figure1,isflexibleenough to support highly-

complex logic functions operating at high speed. The macrocell consists of five sections:

product terms and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop,

output select and enable, and logic array inputs.

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