Features• ATA6833 Temperature Range TA = 125°C, TJ = 150°C• ATA6834 Extended Temperature Range TA = 150°C, TJ = 200°C• Direct Driving of 6 External NM

109122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 3.6 VG RegulatorThe VG regulator provides a stable voltage to supply the low-side gate drivers and to

119122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]3.8 Short Circuit DetectionShort circuits in the motor bridge circuitry are sensed by S1 to S3 inputs.

129122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 3.10 Diagnostic Outputs D1 - D3As mentioned in the sections above, the diagnostic outputs DG1 to DG3 a

139122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]Figure 3-7. Definition of Bus Timing Parameters The recessive BUS level is generated from the integrate

149122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 4. Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause per

159122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]6. Operating RangeThe operating conditions define the limits for functional operation and parametric ch

169122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 1.11 Thermal prewarning set TJPW set120 (170)145 (195)170 (220)°C B1.12 Thermal prewarning reset TJPW

179122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]2.8 Output current limitVMODE=VINT, VBAT>7VVMODE=GND, VBAT>5.5VILoad@ RESET, 150°C < TJ<200

189122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 4.10Input leakage current at the receiver including pull-up resistor as specifiedInput leakage current

199122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]4.22Dominant time for wake-up via LIN-busVLIN = 0V TBUS30 90 150 µs A5 Control Inputs EN1, IL1-3, IH1-3

29122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] Figure 1-1. Block Diagram Supervisor:Short CircuitOvertemperatureUndervoltageCPVBATSW VINTVBATVBATPBATV

209122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 8.4Output peak current at pins Lx switched to LOWVLx = 3V ILxL–100 mA D8.5Output peak current at pins

219122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]8.21Propagation delay time, high-side driver from high to lowtHxHL0.9 µs A8.22Propagation delay time,

229122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 9. ApplicationThis section describes the principal application for which the ATA6833/ATA6834 was desig

239122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]Table 9-1. Typical External ComponentsComponent Function Min. Typical Max.CVINT Blocking capacitor at V

249122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 11. Package Information12. Revision History10. Ordering InformationExtended Type Number Package Remark

9122B–AUTO–10/08Headquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel Asia

39122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]2. Pin ConfigurationFigure 2-1. Pinning QFN48 Note: YWW Date code (Y = Year - above 2000, WW = week num

49122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 18 IL2 I Control Input for output L219 IH2 I Control Input for output H220 IL1 I Control Input for outp

59122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]3. Functional Description 3.1 Power Supply Unit with Supervisor Functions3.1.1 Power SupplyThe IC has to

69122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 3.2 Active Mode and Sleep ModeThe IC has two modes: Sleep Mode and Active Mode. Switching between the m

79122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]3.3 5V/3.3V VCC RegulatorThe 5V/3.3V regulator is fully integrated. It requires an external electrolytic

89122B–AUTO–10/08ATA6833/ATA6834 [Preliminary] 3.4 Reset and Watchdog ManagementThe watchdog timing is based on the trimmed internal watchdog oscillat

99122B–AUTO–10/08ATA6833/ATA6834 [Preliminary]Example:Using an external resistor RWD=33kΩ ±1% results in typical parameters as follows:TOSC= 12.32 µst