Rainbow-electronics NUC100 Manual do Utilizador

NUC100 Series DATA SHEET Cortex™-M0 32-BIT MICROCONTROLLER Publication Release Date: May 31, 2010 - 1 - Revision V1.02 NuMicro Cortex™-M0 NUC10

NUC100 Series DATA SHEET 3.2 Pin Configuration 3.2.1 NUC100 LQFP 100 pin 4142394037383536333432312930272826444543585756555460595352514647495048LQF

NUC100 Series DATA SHEET 3.2.2 NUC100 LQFP 64 pin 63146626450495251545355444342414048474539383230312829262724252323456789101137363534335658576059611

NUC100 Series DATA SHEET 3.2.3 NUC100 LQFP 48 pin LQFP 48-pin383740394241444346454748323630292827262534353133202118191617141513222324123467891051112

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 13 - Revision V1.02 3.3 Pin Description 3.3.1 NUC100 Pin Description Pin No. LQF

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 14 - Revision V1.02 Pin No. LQFP 100 LQFP 64 LQFP 48 Pin Name Pin Type Descripti

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 15 - Revision V1.02 Pin No. LQFP 100 LQFP 64 LQFP 48 Pin Name Pin Type Descripti

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 16 - Revision V1.02 Pin No. LQFP 100 LQFP 64 LQFP 48 Pin Name Pin Type Descripti

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 17 - Revision V1.02 Pin No. LQFP 100 LQFP 64 LQFP 48 Pin Name Pin Type Descripti

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 18 - Revision V1.02 Pin No. LQFP 100 LQFP 64 LQFP 48 Pin Name Pin Type Descripti

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 19 - Revision V1.02 Pin No. LQFP 100 LQFP 64 LQFP 48 Pin Name Pin Type Descripti

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 2 - Revision V1.02 Table of Contents- 1 GENERAL DESCRIPTION ...

NUC100 Series DATA SHEET 4 BLOCK DIAGRAM 4.1 NUC100 Block Diagram FLASH128KBCortex-M050MHzCLK_CTLPDMAISP 4KBSRAM16KBGPIOA,B,C,D,EPS2SPI 2/3UART 1 -1

NUC100 Series DATA SHEET 5 FUNCTIONAL DESCRIPTION 5.1 ARM® Cortex™-M0 core The Cortex™-M0 processor is a configurable, multistage, 32-bit RISC proce

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 22 - Revision V1.02 – Support for both level-sensitive and pulse-sensitive interru

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 23 - Revision V1.02 5.2 System Manager 5.2.1 Overview The following functions a

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 24 - Revision V1.02 5.2.3 System Timer (SysTick) The Cortex-M0 includes an integra

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 25 - Revision V1.02 5.2.4 Nested Vectored Interrupt Controller (NVIC) Cortex-M0 pr

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 26 - Revision V1.02 Table 5-1 Exception Model EExxcceeppttiioonn NNaammee VVeecct

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 27 - Revision V1.02 25 9 TMR1_INT TMR1 Timer 1 interrupt 26 10 TMR2_INT TMR2 Time

NUC100 Series DATA SHEET 5.3 Clock Controller The clock controller generates the clock sources for the whole chip, including all AMBA interface mod

NUC100 Series DATA SHEET 5.3.2 System Clock & SysTick Clock The system clock has 5 clock sources which were generated from clock generator block.

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 3 - Revision V1.02 5.9 Timer Controller ...

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 30 - Revision V1.02 5.3.3 Peripherals Clock The peripherals clock had different c

NUC100 Series DATA SHEET 5.3.5 Frequency Divider Output This device is equipped a power-of-2 frequency divider which is composed by16 chained divide-

NUC100 Series DATA SHEET 5.4 General Purpose I/O 5.4.1 Overview and Features Up to 80 General Purpose I/O pins can be shared with other function

NUC100 Series DATA SHEET 5.4.1.3 Open-Drain Mode Explanation Set GPIOx_PMD (PMDn[1:0]) to 10b the GPIOx port [n] pin is in Open-Drain mode and the I/

NUC100 Series DATA SHEET 5.5 I2C Serial Interface Controller (Master/Slave) 5.5.1 Introduction I2C is a two-wire, bi-directional serial bus that pro

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 35 - Revision V1.02 5.5.2 Features The I2C bus uses two wires (SDA and SCL) to tra

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 36 - Revision V1.02 5.6 PWM Generator and Capture Timer 5.6.1 Introduction This

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 37 - Revision V1.02 5.6.2 Features 5.6.2.1 PWM function features: y Four PWM Gen

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 38 - Revision V1.02 5.7 Real Time Clock (RTC) 5.7.1 Overview Real Time Clock (R

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 39 - Revision V1.02 5.8 Serial Peripheral Interface (SPI) Controller 5.8.1 Overv

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 4 - Revision V1.02 8.1.1 100L LQFP (14x14x1.4 mm footprint 2.0mm) ...

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 40 - Revision V1.02 5.9 Timer Controller 5.9.1 General Timer Controller The tim

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 41 - Revision V1.02 5.10 Watchdog Timer The purpose of Watchdog Timer is to perf

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 42 - Revision V1.02 5.11 UART Interface Controller This MCU provides three channe

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 43 - Revision V1.02 5.11.2 Features of UART controller z The UART control support

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 44 - Revision V1.02 5.12 PS2 Device Controller (PS2D) 5.12.1 Overview PS/2 devic

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 45 - Revision V1.02 5.13 I2S Controller 5.13.1 Overview The I2S controller consis

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 46 - Revision V1.02 5.14 Analog-to-Digital Converter (ADC) 5.14.1 Functional Des

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 47 - Revision V1.02 5.15 Analog Comparator 5.15.1 Functional Description NUC100

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 48 - Revision V1.02 5.16 PDMA Controller 5.16.1 Overview The NUC1XX contains a p

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 49 - Revision V1.02 6 FLASH MEMORY CONTROLLER (FMC) 6.1 Overview NUC1XX series e

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 5 - Revision V1.02 1 GENERAL DESCRIPTION The NUC100 series are 32-bit microcontrol

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 50 - Revision V1.02 7 ELECTRICAL CHARACTERISTICS 7.1 Absolute Maximum Ratings SYM

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 51 - Revision V1.02 7.2 DC Electrical Characteristics (VDD-VSS=3.3V, TA = 25°C, F

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 52 - Revision V1.02 IDD9 5.8 mAVDD = 5V@4Mhz, enable all IP and disable PLL,

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 53 - Revision V1.02 IPWD1 23 μA VDD = 5.5V, RTC OFF, No load @ Disable BOV fu

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 54 - Revision V1.02 ISR11 -300 -370 -450 μA VDD = 4.5V, VS = 2.4V ISR12 -50 -70

NUC100 Series DATA SHEET 7.3 AC Electrical Characteristics tCLCLtCLCXtCHCXtCLCHtCHCL Note: Duty cycle is 50%. PARAMETER SYMBOL MIN. TYP. MAX. UNI

NUC100 Series DATA SHEET 7.3.1.1 Typical Crystal Application Circuits CRYSTAL C1 C2 R 4MHz ~ 24 MHz without without without XTAL2XTAL1C1C2R Figu

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 57 - Revision V1.02 7.3.2 External 32kHz XTAL Oscillator PARAMETER CONDITION MIN.

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 58 - Revision V1.02 7.4 Analog Characteristics 7.4.1 Specification of 12-bit SAR

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 59 - Revision V1.02 7.4.2 Specification of LDO & Power management PARAMETER MI

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 6 - Revision V1.02 2 FEATURES • Core – ARM® Cortex™-M0 core runs up to 50MHz. –

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 60 - Revision V1.02 7.4.3 Specification of Low Voltage Reset PARAMETER CONDITION M

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 61 - Revision V1.02 7.4.6 Specification of Temperature Sensor PARAMETER MIN TYP MA

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 62 - Revision V1.02

NUC100 Series DATA SHEET 8 PACKAGE DIMENSIONS 8.1.1 100L LQFP (14x14x1.4 mm footprint 2.0mm) Controlling Dimension : Millimeters0.100700.0041.000.75

NUC100 Series DATA SHEET 8.1.2 64L LQFP (10x10x1.4mm footprint 2.0 mm ) 0 701.000.750.6012.000.450.0390.0300.0240.4720.0180.500.200.271.451.6010.001.

NUC100 Series DATA SHEET 8.1.3 48L LQFP (7x7x1.4mm footprint 2.0mm) YSEATING PLANEDEebA2A1A11248DHEHL1LcθControlling dimension : Millimeters0.100700.

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 66 - Revision V1.02 9 REVISION HISTORY VERSION DATE PAGE/ CHAP. DESCRIPTION V1.00

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 67 - Revision V1.02 Important Notice Nuvoton products are not designed, intended,

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 7 - Revision V1.02 • Timers – 4 sets of 24-bit timer with 8-bit pre-scaler. – Cou

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 8 - Revision V1.02 • I2C – Two sets of I2C device. – Master/Slave up to 1Mbit/s (

NUC100 Series DATA SHEET Publication Release Date: May 31, 2010 - 9 - Revision V1.02 3 PARTS INFORMATION LIST AND PIN CONFIGURATION 3.1 Products Se