
16-Bit Microcontroller with Infrared Module
MAXQ613
24 _____________________________________________________________________________________
Table 4. Power-Fail Detection States During Normal Operation
STATE POWER-FAIL
INTERNAL
REGULATOR
CRYSTAL
OSCILLATOR
SRAM
RETENTION
COMMENTS
A On Off Off — V
DD
< V
POR
.
B On On On —
V
POR
< V
DD
< V
RST
.
Crystal warmup time, t
XTAL_RDY
.
CPU held in reset.
C On On On —
V
DD
> V
RST
.
CPU normal operation.
D On On On —
Power drop too short.
Power-fail not detected.
E On On On —
V
RST
< V
DD
< V
PFW
.
PFI is set when V
RST
< V
DD
< V
PFW
and
maintains this state for at least t
PFW
, at
which time a power-fail interrupt is gener-
ated (if enabled).
CPU continues normal operation.
F
On
(Periodically)
Off Off Yes
V
POR
< V
DD
< V
RST
.
Power-fail detected.
CPU goes into reset.
Power-fail monitor turns on periodically.
G On On On —
V
DD
> V
RST
.
Crystal warmup time, t
XTAL_RDY
.
CPU resumes normal operation from 8000h.
H
On
(Periodically)
Off Off Yes
V
POR
< V
DD
< V
RST
.
Power-fail detected.
CPU goes into reset.
Power-fail monitor turns on periodically.
I Off Off Off —
V
DD
< V
POR
.
Device held in reset. No operation allowed.
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