
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
20 ____________________________________________________________________
Table 6. Peripheral Register Bit Reset Values (continued)
15 14 13 12 11 10
9876543210
T1H 00000000
T2CNA 00000000
T2H 00000000
T2RH 00000000
T2CH 00000000
IRCN 00000000
T1CL 00000000
T1CH 00000000
T1MD 00000000
T2CNB 00000000
T2V 0 0 0 0000000000000
T2R 0 0 0 0000000000000
T2C 0 0 0 0000000000000
T2CFG 00000000
MCNT 00000000
MA 0 0 0 0000000000000
MB 0 0 0 0000000000000
MC2 0 0 0 0000000000000
MC1 0 0 0 0000000000000
MC0 0 0 0 0000000000000
MC1R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC0R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADCN s s s s 0 s s s 0 0 0 0 0 0 0 0
PHC s 0 0 0 0 0 0 s ssssssss
AD0 i i i iiiiiiiiiiiii
AD1 i i i iiiiiiiiiiiii
ATRM 000sssss
LCRA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LCFG 00000000
Note: Bits marked with an “i” have an indeterminate value upon reset. Bits marked with an “s” have special behavior upon reset.
Refer to the user’s guide supplement for this device for more details.
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