MAX1801
Digital Camera Step-Up Slave
DC-DC Controller
12 ______________________________________________________________________________________
1) Choose the compensation resistor R
C
that is equiv-
alent to the inverse of the transconductance of the
error amplifier, 1/ R
C
= G
EA
= 100µS, or R
C
= 10kΩ.
This sets the high-frequency voltage gain of the
error amplifier to 0dB.
2) Determine the maximum output pole frequency:
where:
R
LOAD(MIN)
= V
OUT
/ I
OUT(MAX)
3) Place the compensation zero at the same frequency
as the maximum output pole frequency (in Hz):
Solving for C
C
:
Use values of C
C
less than 10nF. If the above calcu-
lation determines that the capacitor should be
greater than 10nF, use C
C
= 10nF, skip step 4 , and
proceed to step 5.
4) Determine the crossover frequency (in Hz):
f
C
= V
REF
/ (π D C
OUT
)
and to maintain at least a 10dB gain margin, make
sure that the crossover frequency is less than or
equal to 1/3 of the ESR zero frequency, or:
3f
C
≤ Z
O
or:
ESR ≤ D / 6 V
REF
If this is not the case, go to step 5 to reduce the
error amplifier high-frequency gain to decrease the
crossover frequency.
5) The high-frequency gain may be reduced, thus
reducing the crossover frequency, as long as the
zero due to the compensation network remains at or
below the crossover frequency. In this case:
ESR ≤ D / (G
EA
R
C
6 V
REF
)
and:
f
C
= (G
EA
R
C
) 2 V
REF
/ (2π DC
OUT
) ≥ 1 / (2π R
C
C
C
)
Choose C
OUT
, R
C
, and C
C
to simultaneously satisfy
both equations.
Continuous Inductor Current
For continuous inductor current, there are two condi-
tions that change, requiring different compensation.
The response of the control loop includes a right-half-
plane zero and a complex pole pair due to the inductor
and output capacitor. For stable operation, the con-
troller loop gain must drop below unity (0dB) at a much
lower frequency than the right-half-plane zero frequen-
cy. The zero arising from the ESR of the output capaci-
tor is typically used to compensate the control circuit
by increasing the phase near the crossover frequency,
increasing the phase margin. If a low-value, low-ESR
output capacitor (such as a ceramic capacitor) is used,
the ESR-related zero occurs at too high a frequency
and does not increase the phase margin. In this case,
use a lower value inductor so that it operates with dis-
continuous current (see the Discontinuous Inductor
Current section).
For continuous inductor current, the gain of the voltage
divider is A
VDV
= V
REF
/ V
OUT
, and the DC gain of the
error amplifier is A
VEA
= 2000. The gain through the
PWM controller in continuous current is:
A
VO
= (1 / V
REF
) (V
OUT
2
/ V
IN
)
Thus, the total DC loop gain is:
A
VDC
= 2000 V
OUT
/ V
IN
The complex pole pair due to the inductor and output
capacitor occurs at the frequency (in Hz):
P
O
= (V
OUT
/ V
IN
) / (2π (L × C
OUT
)
1/2
)
The pole and zero due to the compensation network at
COMP occur at the frequencies (in Hz):
P
C
= G
EA
/ (4000 π C
C
) = 1 / (4 x 10
7
π C
C
)
Z
C
= 1 / (2π R
C
C
C
)
The frequency (in Hz) of the zero due to the ESR of the
output capacitor is:
Z
O
= 1 / (2π C
OUT
ESR)
And the right-half-plane zero frequency (in Hz) is:
The Bode plot of the loop gain of this control circuit is
shown in Figure 5.
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