Rainbow-electronics MAX1329 Manual do Utilizador descarregar pdf (Página 48)

MAX1329/MAX1330

12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,

Reference, Voltage Monitors, and Temp Sensor

48 ______________________________________________________________________________________

ADC LT Alarm Register

The ADC LT Alarm register contains the less-than

mode, trip count, and threshold settings. Writing the

alarm is functional for the normal, fast power-down, and

burst modes.

LTAM: ADC Less-Than Alarm Mode bit (default = 0).

LTAM = 0 means that the alarm trips need not be con-

secutive to cause the LTA Status bit to be set. LTAM = 1

means that the alarm trips must be consecutive before

the LTA Status bit is set.

LTAC<2:0>: ADC Less-Than Alarm Trip Count bits

(default = 000). LTAC<2:0> set the number of conver-

sion results needed to be less than the alarm threshold

before the LTA Status bit is set.

LTAT<11:0>: ADC Less-Than Alarm Threshold bits

(default = 0x000). When the required number of ADC

conversions results less than the threshold set by the

LTAT<11:0> bits have been completed, the LTA Status

bit is set in the Status register. Clearing the LTA Status

bit by reading the Status register or writing to the ADC LT

Alarm register restarts the trip count. The LTAT<11:0>

bits are in binary format when the ADC is in unipolar

mode and two’s complement format when the ADC is in

bipolar mode. Disable the LT alarm by setting

LTAT<11:0> to 0x000 when the ADC is in unipolar mode

and 0x800 when the ADC is in bipolar mode.

MSB

NAME LTAM LTAC2 LTAC1 LTAC0 LTAT11 LTAT10 LTAT9 LTAT8

DEFAULT 00000000

LSB

NAME LTAT7 LTAT6 LTAT5 LTAT4 LTAT3 LTAT2 LTAT1 LTAT0

DEFAULT 00000000

Table 13b. ADC Less-Than Alarm Trip

Count Bit Configuration

LTAC2 LTAC1 LTAC0 NUMBER OF TRIPS

000 1

001 2

010 3

011 4

100 5

101 6

110 7

111 8

1 2 ... 43 44 45 46 47 48 49 50 51 52 53 ... 77 78

MAX1329/MAX1330 1

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