MAX1123
1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
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Pin Description (continued)
OV
CC
Digital Supply Voltage. Bypass with a 0.1µF capacitor for best decoupling results.
29–32 N.C. No Connection. Do not connect to these pins.
33 D0N Complementary Output Bit 0 (LSB)
34 D0P True Output Bit 0 (LSB)
35 D1N Complementary Output Bit 1
36 D1P True Output Bit 1
37 D2N Complementary Output Bit 2
38 D2P True Output Bit 2
39 D3N Complementary Output Bit 3
40 D3P True Output Bit 3
42 DCLKN
Complementary Clock Output. This output provides an LVDS-compatible output level and can
be used to synchronize external devices to the converter clock. There is a 2.1ns delay
between CLKP and DCLKP.
43 DCLKP
True Clock Output. This output provides an LVDS-compatible output level and can be used to
synchronize external devices to the converter clock. There is a 2.1ns delay between CLKN
and DCLKN.
46 D4N Complementary Output Bit 4
47 D4P True Output Bit 4
48 D5N Complementary Output Bit 5
49 D5P True Output Bit 5
50 D6N Complementary Output Bit 6
51 D6P True Output Bit 6
52 D7N Complementary Output Bit 7
53 D7P True Output Bit 7
54 D8N Complementary Output Bit 8
55 D8P True Output Bit 8
56 D9N Complementary Output Bit 9 (MSB)
57 D9P True Output Bit 9 (MSB)
58 ORN
Complementary Output for Out-of-Range Control Bit. If an out-of-range condition is detected,
bit ORN flags this condition by transitioning low.
59 ORP
True Output for Out-of-Range Control Bit. If an out-of-range condition is detected, bit ORP
flags this condition by transitioning high.
68 T/B
Two’s Complement or Binary Output Format Selection. This LVCMOS-compatible input
controls the digital output format of the MAX1123. T/B has an internal pulldown resistor.
T/B = 0: Two’s complement output format
T/B = 1: Binary output format
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