MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
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Pin Description
16 SSTRB
Serial-Strobe Output. In internal clock mode, SSTRB goes low when the MAX1112/
MAX1113 begin the A/D conversion and goes high when the conversion is complete.
In external clock mode, SSTRB pulses high for two clock periods before the MSB is
shifted out. High impedance when CS is high (external clock mode only).
20 V
DD
Positive Supply Voltage, +4.5V to +5.5V
18
CS
Active-Low Chip Select. Data is not clocked into DIN unless CS is low. When CS is
high, DOUT is high impedance.
19 SCLK
Serial-Clock Input. Clocks data in and out of serial interface. In external clock mode,
SCLK also sets the conversion speed (duty cycle must be 45% to 55%).
17 DIN Serial-Data Input. Data is clocked in at SCLK’s rising edge.
12 REFOUT Internal Reference Generator Output. Bypass with a 1µF capacitor to AGND.
14 DGND Digital Ground
15 DOUT
Serial-Data Output. Data is clocked out on SCLK’s falling edge. High impedance when
CS is high.
13 AGND Analog Ground
10
SHDN
Three-Level Shutdown Input. Normally floats. Pulling SHDN low shuts the MAX1112/
MAX1113 down to 10µA (max) supply current; otherwise, the devices are fully opera-
tional. Pulling SHDN high shuts down the internal reference.
11 REFIN
Reference Voltage Input for Analog-to-Digital Conversion. Connect to REFOUT to use
the internal reference.
5–8 CH4–CH7 Sampling Analog Inputs
1–4 CH0–CH3 Sampling Analog Inputs
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