Rainbow-electronics ADC12138 Manual do Utilizador

TL/H/12079ADC12130/ADC12132/ADC12138 Self-Calibrating 12-Bit Plus SignSerial I/O A/D Converters with MUX and Sample/HoldMarch 1995ADC12130/ADC12132/AD

AC Electrical Characteristics (Continued)TL/H/12079–5FIGURE 1a. Transfer CharacteristicTL/H/12079–6FIGURE 1b. Simplified Error Curve vs Output Code wi

AC Electrical Characteristics (Continued)TL/H/12079–7FIGURE 1c. Simplified Error Curve vs Output Code after Auto-Calibration CycleTL/H/12079–8FIGURE 2

Typical Performance CharacteristicsThe following curves apply for 12-bitasign mode after auto-calibration unless otherwise specified.vs Clock Frequenc

Typical Performance CharacteristicsThe following curves apply for 12-bitasign mode after auto-calibration unless otherwise specified. (Continued)vs Te

Typical Dynamic Performance CharacteristicsThe following curves apply for 12-bitasign mode after auto-calibration unless otherwise specified.with 1 kH

Typical Dynamic Performance CharacteristicsThe following curves apply for 12-bitasign mode after auto-calibration unless otherwise specified. (Continu

Test CircuitsDO ‘‘TRI-STATE’’ (t1H,t0H)TL/H/12079–13DO except ‘‘TRI-STATE’’TL/H/12079–14Leakage CurrentTL/H/12079–15Timing DiagramsDO Falling and Risi

Timing Diagrams (Continued)DO Data Output Timing Using CSTL/H/12079–19DO Data Output Timing with CS Continuously LowTL/H/12079–20ADC12138 Auto Cal or

Timing Diagrams (Continued)ADC12138 Read Data without Starting a Conversion Using CSTL/H/12079–22ADC12138 Read Data without Starting a Conversion with

Timing Diagrams (Continued)ADC12138 Conversion Using CSwith 16-Bit Digital Output FormatTL/H/12079–24ADC12138 Conversion with CS Continuously Low and

Connection Diagrams16-Pin Dual-In-Line andWide Body SO PackagesTL/H/12079–2Top View20-Pin SSOP PackageTL/H/12079–47Top View28-Pin Dual-In-Line, SSOP a

Timing Diagrams (Continued)ADC12138 Software Power Up/Down Using CSwith 16-Bit Digital Output FormatTL/H/12079–26ADC12138 Software Power Up/Down with

Timing Diagrams (Continued)ADC12138 Hardware Power Up/DownTL/H/12079–28Note: Hardware power up/down may occur at any time. If PD is high while a conve

Pin DescriptionsCCLK The clock applied to this input controls the suces-sive approximation conversion time interval andthe acquisition time. The rise

Pin Descriptions (Continued)VREFbThe negative voltage reference input. In orderto maintain accuracy, the voltage at this pinmust not go below GND or e

TablesTABLE I. Data Out FormatsDO Formats DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 DB16SignwithMSBFirst17X X X X Sign MSB

Tables (Continued)TABLE III. ADC12130 and ADC12132 Multiplexer AddressingAnalog Channel AddressedA/D InputMultiplexerModeMUX and AssignmentPolarityOut

Tables (Continued)TABLE VI. Status RegisterStatus BitDB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8LocationStatus Bit PU PD Cal 12 or 13 16 or 17 Sign Justificat

Application Hints (Continued)it will expect to see 13 SCLK pulses for each I/O transmis-sion. The number of SCLK pulses that the ADC expects tosee is

Application Hints (Continued)1.6 User Mode and Test ModeAn instruction may be issued to the ADC to put it into testmode. Test mode is used by the manu

Application Hints (Continued)With the single-ended multiplexer configuration CH0through CH7 can be assigned to the MUXOUT1 pin. TheCOM pin is always a

Absolute Maximum Ratings (Notes1&2)If Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Dist

Application Hints (Continued)For pseudo-differential signed operation, the biasing circuitshown inFigure 10shows a signal AC coupled to the ADC.This g

Application Hints (Continued)TL/H/12079–41FIGURE 12. Pseudo-Differential Biasing without the Loss of Digital Output RangeTL/H/12079–42FIGURE 13. Fully

Application Hints (Continued)3.0 REFERENCE VOLTAGEThe difference in the voltages applied to the VREFaandVREFbdefines the analog input span (the differ

Application Hints (Continued)6.0 INPUT SOURCE RESISTANCEFor low impedance voltage sources (k600X), the inputcharging current will decay, before the en

Application Hints (Continued)11.0 CLOCK SIGNAL LINE ISOLATIONThe ADC12130/2/8’s performance is optimized by routingthe analog input/output and referen

Application Hints (Continued)TL/H/12079–46Note: VAa,VDa, and VREFaon the ADC12138 each have 0.01 mF and 0.1 mF chip caps, and 10 mF tantalum caps. All

Application Hints (Continued)’variables DOL4Data Out word length, DI4Data string for A/D DI input,’DO4A/D result string’SET CS# HIGHOUT &H3FC, (&a

Physical Dimensions inches (millimeters)Order Number ADC12130CIWMNS Package Number M16BOrder Number ADC12138CIWMNS Package Number M28B37

Physical Dimensions inches (millimeters) (Continued)Order Number ADC12132CIMSANS Package Number MSA20Order Number ADC12138CIMSANS Package Number MSA28

Physical Dimensions inches (millimeters) (Continued)Order Number ADC12130CINNS Package Number N16E39

Converter Electrical CharacteristicsThe following specifications apply for (VaeVAaeVDaea5V, VREFaea4.096V, and fully differential input with fixed2.04

ADC12130/ADC12132/ADC12138 Self-Calibrating 12-Bit Plus SignSerial I/O A/D Converters with MUX and Sample/HoldPhysical Dimensions inches (millimeters)

Electrical CharacteristicsThe following specifications apply for (VaeVAaeVDaea5V, VREFaea4.096V, and fully differential input with fixed2.048V common-

DC and Logic Electrical CharacteristicsThe following specifications apply for (VaeVAaeVDaea5V, VREFaea4.096V, and fully-differential input with fixed2

AC Electrical CharacteristicsThe following specifications apply for (VaeVAaeVDaea5V, VREFaea4.096V, and fully-differential input with fixed2.048V comm

AC Electrical CharacteristicsThe following specifications apply for (VaeVAaeVDaea5V, VREFaea4.096V, and fully-differential input with fixed2.048V comm

AC Electrical Characteristics (Continued)Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratin