TL/H/11108ADC10461/ADC10462/ADC10464 10-Bit 600 ns A/D Converterwith Input Multiplexer and Sample/HoldDecember 1994ADC10461/ADC10462/ADC10464 10-Bit 6
Functional DescriptionThe ADC10461, ADC10462 and ADC10464 digitize an ana-log input signal to 10 bits accuracy by performing two lower-resolution ‘‘fl
Applications Information1.0 MODES OF OPERATIONThe ADC10461, ADC10462, and ADC10464 have two basicdigital interface modes.Figure 1andFigure 2are timing
Applications Information (Continued)TL/H/11108– 14FIGURE 4. Typical Connection. Note the multiple bypass capacitors on the reference and power supply
Applications Information (Continued)ic characteristics such as signal-to-noise ratio (SNR) andtotal harmonic distortion (THD), are quantitative measur
Physical Dimensions inches (millimeters)Order Number ADC10461CIWMNS Package Number M20B15
Physical Dimensions inches (millimeters) (Continued)Order Number ADC10462CIWMNS Package Number M24BOrder Number ADC10464CIWMNS Package Number M28B16
Physical Dimensions inches (millimeters) (Continued)Order Number ADC10461CINNS Package Number N20AOrder Number ADC10462CINNS Package Number N24A17
ADC10461/ADC10462/ADC10464 10-Bit 600 ns A/D Converterwith Input Multiplexer and Sample/HoldPhysical Dimensions inches (millimeters) (Continued)Order
Absolute Maximum Ratings (Notes 1, 2)If Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Distri
DC Electrical CharacteristicsThe following specifications apply for Vaea5V, VREF(a)e5V VREF(b)eGND, and Speed Adjust pin unconnected unlessotherwise s
AC Electrical Characteristics (Continued)The following specifications apply for Vaea5V, tretfe20 ns, VREF(a)e5V, VREF(b)eGND, and Speed Adjust pinunco
Typical Performance Characteristicsvs Reference VoltageZero (Offset) Errorvs Reference VoltageLinearity Errorvs TemperatureAnalog Supply Currentvs Tem
Typical Performance Characteristics (Continued)vs Signal FrequencySignal-to-NoiseaTHD Ratio(ADC10462 and ADC10464 Only)vs Speed-Up ResistorLinearity C
TRI-STATE Test Circuits and WaveformsTL/H/11108– 3TL/H/11108– 4TL/H/11108– 5TL/H/11108– 6Timing DiagramsTL/H/11108– 7FIGURE 1. Mode 1. The conversion
Timing Diagrams (Continued)TL/H/11108– 8FIGURE 2. Mode 2 (RD Mode). The conversion time (tCRD) includes thesampling time and is determined by the inte
Connection DiagramsDual-In-Line PackageTL/H/11108– 10Top ViewDual-In-Line PackageTL/H/11108– 11Top ViewDual-In-Line PackageTL/H/11108– 12Top ViewPin D
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