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ATmega8
2486AS–08/01
The AVR core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing
two independent registers to be accessed in one single instruction executed in one clock
cycle. The resulting architecture is more code efficient while achieving throughputs up to
ten times faster than conventional CISC microcontrollers.
The ATmega8 provides the following features: 8K bytes of In-System Programmable
Flash with Read-While-Write capabilities, 512 bytes of EEPROM, 1K byte of SRAM, 23
general-purpose I/O lines, 32 general purpose working registers, three flexible
timer/counters with compare modes, internal and external interrupts, a serial program-
mable USART, a byte oriented 2-wire Serial Interface, a 6-channel ADC (8 channels in
TQFP and MLF packages) where 4 (6) channels have 10-bit accuracy and 2 channels
have 8-bit accuracy, a programmable Watchdog Timer with internal oscillator, an SPI
serial port, and five software selectable power saving modes. The Idle mode stops the
CPU while allowing the SRAM, timer/counters, SPI port, and interrupt system to con-
tinue functioning. The Power-down mode saves the register contents but freezes the
oscillator, disabling all other chip functions until the next interrupt or hardware reset. In
Power-save mode, the asynchronous timer continues to run, allowing the user to main-
tain a timer base while the rest of the device is sleeping. The ADC Noise Reduction
Mode stops the CPU and all I/O modules except asynchronous timer and ADC, to mini-
mize switching noise during ADC conversions. In Standby mode, the crystal/resonator
oscillator is running while the rest of the device is sleeping. This allows very fast start-up
combined with low-power consumption.
The device is manufactured using Atmel’s high density nonvolatile memory technology.
The Flash program memory can be reprogrammed In-System through an SPI serial
interface, by a conventional nonvolatile memory programmer, or by an on-chip boot pro-
gram running on the AVR core. The boot program can use any interface to download the
application program in the Application Flash Memory. Software in the Boot Flash Sec-
tion will continue to run while the Application Flash Section is updated, providing true
Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Pro-
grammable Flash on a monolithic chip, the Atmel ATmega8 is a powerful microcontroller
that provides a highly-flexible and cost-effective solution to many embedded control
applications.
The ATmega8 AVR is supported with a full suite of program and system development
tools, including C compilers, macro assemblers, program debugger/simulators, In-circuit
emulators, and evaluation kits.
Pin Descriptions
VCC Digital supply voltage.
GND Ground.
Port B (PB7..PB0)/XTAL1
/XTAL2 /TOSC1 /TOSC2
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Depending on the clock selection fuse settings, PB6 can be used as input to the invert-
ing oscillator amplifier and input to the internal clock operating circuit.
Depending on the clock selection fuse settings, PB7 can be used as output from the
inverting oscillator amplifier.
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