Rainbow-electronics AT89LP216 Manual do Utilizador descarregar pdf (Página 17)

3621A–MICRO–6/06

AT89LP216 [Preliminary]

Figure 11-3. Reset Recovery from Power-down.

Table 11-1. PCON – Power Control Register

PCON = 87H Reset Value = 000X 0000B

Not Bit Addressable

SMOD1 SMOD0 PWDEX POF GF1 GF0 PD IDL

Bit76543210

PWD

RST

XTAL1

SUT

Internal

Clock

Internal

Reset

Symbol Function

SMOD1 Double Baud Rate bit. Doubles the baud rate of the UART in Modes 1, 2, or 3.

SMOD0 Frame Error Select. When SMOD0 = 1, SCON.7 is SM0. When SMOD0 = 1, SCON.7 is FE. Note that FE will be set after

a frame error regardless of the state of SMOD0.

PWDEX Power-down Exit Mode. When PWDEX = 1, wake up from Power-down is externally controlled. When PWDEX = 1, wake

up from Power-down is internally timed.

POF Power Off Flag. POF is set to “1” during power up (i.e. cold reset). It can be set or reset under software control and is not

affected by RST or BOD (i.e. warm resets).

GF1, GF0 General-purpose Flags

PD Power-down bit. Setting this bit activates power-down operation.

IDL Idle Mode bit. Setting this bit activates Idle mode operation

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 89 90

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