Rainbow-electronics MAX3580 Manual do Utilizador descarregar pdf (Página 12)

MAX3580

Direct-Conversion TV Tuner

12 ______________________________________________________________________________________

Detailed Description

Programmable Registers

The MAX3580 includes thirteen write/read registers and

three read-only registers. See Table 2 for register con-

figuration and the

section. The

and the bit usage information for all registers. “U”

labeled under each bit name indicates that the bit

value is user defined to meet specific application

requirements. A “0” or “1” indicates that the bit must be

set to the defined “0” or “1” value for proper operation.

Operation is not tested or guaranteed if these bits are

programmed to other values and is only for

factory/bench evaluation. For field use, always program

to the defined operational state. Note that all registers

must be written after and no earlier than 100µs after

device power-up.

Table 2. Register Configuration

8-BIT DATA REGISTER SETTINGS

ADDRESS

D7 D6 D5 D4 D3 D2 D1 D0

OPERATION

DEFINED

DEFAULT

SETTINGS

(POR)

NAME

0x00

— H17 N-Divider Integer

0x01

LI1

LI0

INT

F19

F18

F17

F16

— h18 N-Divider Frac2

0x02

F15

F14

F13

F12

F11

F10

— h00 N-Divider Frac1

0x03

— h00 N-Divider Frac0

0x04

TFS<7>

TFS<6>

TFS<5>

TFS<4>

TFS<3>

TFS<2>

TFS<1>

TFS<0>

—hDB

Tracking Filter

Series Caps

0x05

VCO_DIV1

VCO_DIV0

RFS

TF_BS

TFP<3>

TFP<2>

TFP<1>

TFP<0>

— h7C

Tracking Filter

Parallel Cap

0x06

RDIV

ICP

CPS

ADLY1

ADLY0

LF_DIV2

LF_DIV1

LF_DIV0

— h0A PLL Configuration

0x07

CP_TST2

CP_TST1

CP_TST0

TURBO

LD_MUX2

LD_MUX1

LD_MUX0

— h08 Test Functions

0x08

SHDN_BG

SHDN_PD

SHDN_REF

SHDN_SYN

SHDN_MX

SHDN_BB

SHDN_RF

— h00 Shutdown Control

0x09

VCO1

VCO0

BS2

BS1

BS0

VAS

ADL

ADE

— hC0 VCO Control

0x0A

BB_BW3

BB_BW2

BB_BW1

BB_BW0

PD_TH2

PD_TH1

PD+TH0

— h87 Baseband Control

0x0B

BB_BIA

DC_DAC8

DC_MO1

DC_MO0

DC_SP1

DC_SP0

DC_TH1

DC_TH0

h38 h40 DC Offset Control

0x0C

DC_DAC7

DC_DAC6

DC_DAC5

DC_DAC4

DC_DAC3

DC_DAC2

DC_DAC1

DC_DAC0

h00 h00 DC Offset DAC

0x0D

FUSE_TH

TFA<3>

TFA<2>

TFA<1>

TFA<0>

— h00

ROM Table

Address

0x0E

TFD<7>

TFD<6>

TFD<5>

TFD<4>

TFD<3>

TFD<2>

TFD<1>

TFD<0>

h00 h00

ROM Table Fuse

Data

0x0F

MX_HR<3>

MX_HR<2>

MX_HR<1>

MX_HR<0>

h00 h00

Mixer Harmonic

Rejection

0x10 TFR<7> TFR<6> TFR<5> TFR<4> TFR<3> TFR<2> TFR<1> TFR<0>

N/A

ROM Table Data

Read Back

0x11 POR VASA VASE LD DC_LO DC_HI GKT PD_OVLD N/A N/A

Chip Status Read

Back

0x12 VCO1A VCO0A BS2A BS1A BS0A ADC2 ADC1 ADC0 N/A N/A

Autotuner Read

Back

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 20 21

Direct-Conversion TV Tuner 1

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