Rainbow-electronics MAX6965 Manual do Utilizador descarregar pdf (Página 9)

Message Format for Reading

The MAX6965 is read using the MAX6965’s internally

stored command byte as an address pointer the same

way the stored command byte is used as an address

pointer for a write. The pointer autoincrements after

each data byte is read using the same rules as for a

write (Table 2). Thus, a read is initiated by first configur-

ing the MAX6965’s command byte by performing a

write (Figure 7). The master can now read n consecu-

tive bytes from the MAX6965 with the first data byte

being read from the register addressed by the initial-

ized command byte. When performing read-after-write

verification, remember to reset the command byte’s

address because the stored command byte address

has been autoincremented after the write (Table 2).

MAX6965

9-Output LED Driver with Intensity Control

_______________________________________________________________________________________ 9

Figure 8. Command and Single Data Byte Received

SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE

BYTE

AUTOINCREMENT MEMORY ADDRESS

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX6965 ACKNOWLEDGE FROM MAX6965

ACKNOWLEDGE FROM MAX6965

HOW COMMAND BYTE AND DATA BYTE MAP INTO

MAX6965's REGISTERS

R/W

Figure 9. n Data Bytes Received

SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE

BYTES

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX6965 ACKNOWLEDGE FROM MAX6965

ACKNOWLEDGE FROM MAX6965

HOW COMMAND BYTE AND DATA BYTE MAP INTO

MAX6965's REGISTERS

R/W

AUTOINCREMENT MEMORY ADDRESS

Figure 7. Command Byte Received

SAA

0SLAVE ADDRESS COMMAND BYTE

ACKNOWLEDGE FROM MAX6965

D15 D14 D13 D12 D11 D10 D9 D8

COMMAND BYTE IS STORED ON RECEIPT OF

STOP CONDITION

ACKNOWLEDGE FROM MAX6965

R/W

Figure 10. Write Timing Diagram

SLAVE ADDRESS

123456789

SA6A5A4A3A2A1A00A0 000000

COMMAND BYTE

1A A AP

START CONDITION

ACKNOWLEDGE FROM SLAVE

ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE STOP

CONDITION

O7–O0

DATA1 VALID DATA2 VALID

SCL

SDA

WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)

R/W

MSB LSBDATA1 MSB LSBDATA2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 22 23

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