
42 _____________________________________________________________________________________
MAX3107
SPI/I
2
C UART with 128-Word FIFOs
and Internal Oscillator
Bits 7 and 6: No Function
Bit 5: 4xMode
When the 4xMode bit is set high, the MAX3107 baud rate is quadruple the regular (16x sampling) baud rate. The
2xMode bit should be set low if 4xMode is enabled. See the 2x and 4x Rate Modes section for more information.
Bit 4: 2xMode
When the 2xMode bit is set high, the MAX3107 baud rate is double the regular (16x sampling) baud rate. See the 2x
and 4x Rate Modes section for a detailed description.
Bits 3–0: FRACT[3:0]
This is the fractional portion of the baud-rate generator divisor. Set FRACT[3:0] to zero if not used. See the Fractional
Baud-Rate Generator section for calculations.
DIVLSB and DIVMSB define the baud-rate generator integer divisors. The minimum value is 1. See the Fractional Baud
Rate Generator section for more information.
Bits 7–0: Div[7:0]
Div[7:0] are the 8 LSBs of the integer divisor portion (DIV) of the baud-rate generator.
Bits 7–0: Div[15:8]
Div[15:8] is the MSB portion of the integer divisor (DIV).
BRGConfig—Baud-Rate Generator Configuration Register
DIVLSB—Baud-Rate Generator LSB Divisor Register
DIVMSB—Baud-Rate Generator MSB Divisor Register
ADDRESS: 0x1B
MODE: R/W
BIT 7 6 5 4 3 2 1 0
NAME
— — 4xMode 2xMode FRACT3 FRACT2 FRACT1 FRACT0
RESET
0 0 0 0 0 0 0 0
ADDRESS: 0x1C
MODE: R/W
BIT 7 6 5 4 3 2 1 0
NAME
Div7 Div6 Div5 Div4 Div3 Div2 Div1 Div0
RESET
0 0 0 0 0 0 0 1
ADDRESS: 0x1D
MODE: R/W
BIT 7 6 5 4 3 2 1 0
NAME
Div15 Div14 Div13 Div12 Div11 Div10 Div9 Div8
RESET
0 0 0 0 0 0 0 0
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