Rainbow-electronics DS2432 Manual do Utilizador descarregar pdf (Página 11)

PRELIMINARY DS2432

11 of 30

Memory and SHA Functions Flow Chart (continued) Figure 7

33h

Compute Next

Secret ?

Valid Data

Address ?

Y

N

Bus Master TX

TA1 (T7:T0),

TA2

(

T15:T8

)

Y

Bus Master

RX “1”s

Master

TX Reset ?

Y

N

*

1-Wire idle high for power

Note: The master must first

load the scratchpad with a

p

artial secret of 8 bytes

From Figure 7

3

rd

Part

To Figure 7

3

rd

Part

From Figure 7

5

th

Part

To Figure 7

5

th

Part

N

N

SHA Engine Computes Message

Authentication Code of Current

Secret, Page Data, and 8 Byte

Partial Secret in Scratch

p

ad

DS2432 Copies a Partial MAC

to the Secret Register

Master

TX Reset ?

Master

TX Reset ?

Y

N

DS2432 TX “1”

DS2432 TX “0”

N

Y

DS2432 fills Scratchpad with AAh

*

*

Write-

Protected ?

Y

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