
DS2417
12 of 15
READ/WRITE TIMING DIAGRAM (continued) Figure 9
Read-data Time Slot
RESISTOR
MASTER
DS2417
Master
Sampling Window
60 µs
£
t
SLOT
< 120 µs
1 µs
£
t
LOWR
< 15 µs
0
£
t
RELEASE
< 45 µs
1 µs
£
t
REC
<
¥
t
RDV
= 15 µs
t
SU
< 1 µs
V
PULLUP
V
PULLUP MIN
V
IH MIN
V
IL MAX
0V
t
SLOT
t
REC
t
LOWR
t
SU
t
RDV
t
RELEASE
CRYSTAL PLACEMENT ON PCB Figure 10
X2
GUARD RING
ON SIGNAL
PLANE
PLANE BENEATH
LOCAL GROUND
SIGNAL PLANE
OR ON OTHER
SIDE OF PCB
CRYSTAL
PADS
GND
X1
1-Wire
V
DD
INT\
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